Rca Inc.

Digital Equipment Corporation

Compaq Computer Corporation, Inc.

William Edward Ham

Fee Lee

Charles Monia

Hans P Kleinknecht

Charles G Bagg

Heinrich Meier

Thomas W Pote

A parallel data bus tester is particularly applicable to SCSI type buses, and uses a plurality of comparator circuits to simultaneously examine the voltages present on the conductors of a bus cable. For twisted pair type conductors, the tester uses a high reference voltage, which is compared to the high voltage conductor of each pair, and a low reference voltage, which is compared to the low voltage conductor of each pair. The reference voltages are adjustable, and allow each reference voltage to be swept through the expected voltage range for its respective conductors. As the level of a reference voltage crosses that of a conductor voltage being examined, a comparator that receives the reference voltage and conductor voltage changes output state. This output is used to drive a corresponding LED assigned to the conductor in question. Thus, as the reference voltage, which is compared to each of its corresponding conductor voltages (i.e., high or low), is swept through the voltage range of those conductors, the LEDs for each conductor turn on. If any of the LEDs turns on at a significantly different voltage level than the others, it indicates a potential problem with that conductor. Latch circuits for each of the comparator outputs are also provided, allowing intermittent errors to be recorded.

Integrity tester for parallel signal bus

A SCSI bus extender apparatus coupling a main SCSI bus to a auxiliary SCSI bus includes a mechanism for detecting and processing SELECTION and RESELECTION signals transmitted between the two buses to accommodate target devices on the auxiliary bus which support tagged queuing in accordance with the SCSI protocol. The invention contemplates reserving an address on the auxiliary bus for each initiator on the main bus and performing the appropriate address conversions to enable target devices to properly identify the correct initiator device during a RESELECTION phase.

SCSI bus extender utilizing tagged queuing in a multi-initiator environment

A SCSI bus extender apparatus coupling a primary SCSI bus to a secondary SCSI bus includes a mechanism for detecting and resolving contention between a substantially simultaneous SELECTION operation on the primary bus and a RESELECTION operation on the secondary bus. The inventive method contemplates the bus extender arbitrating for control of the primary bus after a conflict is detected, and releasing control of the secondary bus if control of the primary bus is obtained. A target device on the secondary bus can then rearbitrate for control of the secondary bus. Once the target device controls the secondary bus, it can direct a RESELECTION signal to the bus extender, which responsively directs the signal to an initiator device on the primary bus. If the bus extender is unable to gain control of the primary bus after a conflict is detected, the SELECTION operation is allowed to proceed and the target device reattempts to assert the RESELECTION operation thereafter.

Method and apparatus for resolving over lapping selection and

A cable used for transmitting the signals of a communications bus, such as a SCSI bus, having arbitration control signals subject to a wired-or glitch--such as the SCSI BSY signal. Low characteristic impedence conductors ensure that voltage reflections resulting from the deassertion of the BSY signal do not exceed a minimum threshold signal assertion voltage, allowing an increase in the maximum length of the SCSI bus cable.

Apparatus for increasing SCSI bus length through special transmission of

A cable used for transmitting the signals of a communications bus, such as a SCSI bus, having arbitration control signals subject to a wired-or glitch--such as the SCSI BSY signal. High propagation speed conductors increase the propagation speed of the BSY signal, resulting in a proportionate increase in the maximum length of the SCSI bus cable while maintaining adherence with the SCSI bus timing specifications.

Apparatus for increasing SCSI bus length by increasing the signal

A novel process is described for the removal of the objectionable point (tilt projection, appearing at the top of a silicon island). The process includes the formation of a thick insulating layer on the top surface of the island, etching the top and sides of the insulating layer to expose, at the least, the objectionable point and, thereafter, etching the objectionable point to produce a rounded edge.

Process for forming an improved silicon-on-sapphire device

The image transfer process in integrated circuit (IC) processes such as large scale integrated (LSI) device process manufacturing is monitored by optical measurements on a stage-by-stage basis by measuring a monitor specimen or test sample formed with a diffraction grating of a predetermined pattern having a strip width corresponding to the desired line widths of the wafers or masks being monitored. A beam of monochromatic light is scanned over the test sample to generate diffracted beams of various orders. Line width, line depth, line edge profile process errors can be determined by various combinations of the diffracted beams of the zero, first, second, etc., orders. The test sample is scanned to generate a display for data representing the diffracted beams. The parameter data can be stored for later use for quality control, process monitoring, circuit design parameters, and the like. Moreover, gross process errors are visually discernible on the monitor specimen.

Optical measurements of fine line parameters in integrated circuit

A monolithic semiconductor-on-insulator device includes silicon islands in spaced relation on the surface of an insulating substrate, with the spaces between the islands occupied by a passivating material which comprises a layer of a semi-insulating material having finite but low conductivity on the surface of the substrate and extending between adjacent islands into contiguous relation with the side surfaces thereof. The surface of the semi-insulating material has a layer of insulating silicon dioxide thereon. The conductivity of the semi-insulating material is such that charge does not accumulate in this material adjacent to the side edges of the islands, but its conductivity is low enough so that leakage currents between devices remain below an amount which would render the circuit which uses the device non-operative.

Semiconductor-on-insulator device and method for its manufacture

A method for protecting electronic circuitry formed on the obverse side of a wafer from flying debris produced either by the mechanical or laser scribing or scoring of the wafer and during separation. The device is provided with a layer of abrasion resistant material on the circuit side of the wafer and the scribing or scoring is done on the obverse side of the wafer. The cracking operation is performed by applying pressure to the wafer in such a manner as to have the reverse side in tension and the obverse or circuit side in compression in order to prevent any debris which may have been cast up during the scribing or scoring operation from contaminating or damaging the circuit side of the wafer while any debris cast up during the breaking operation is thrown away from the obverse or circuit side.

Method for cracking and separating pellets formed on a wafer

A semiconductor wafer is cleansed of loose foreign surface matter and chemical impurities near the surface in an apparatus which passes superheated steam over the wafer. Condensate is permitted to form and drip off the wafer. After rising above 100.degree. C. the wafer becomes dry, and is removed from the apparatus and then permitted to cool.

Method for cleaning and drying semiconductors

The method is used to determine whether holes etched into a dielectric layer which has been formed on a surface of a semiconductor wafer are open. A plurality of specimen holes are formed in a selected portion of the wafer simultaneously with the formation of the holes to be tested. The specimen holes are then contacted with an electrolytic probe, and the wafer is contacted with an output probe. The resistance, through the wafer, between the electrolytic probe and the output probe is determined. Since the resistance is related to the amount of dielectric material remaining in the hole, a non-destructive determination may be made as to whether the device should be subjected to additional etching.

Method for determining whether holes in dielectric layers are opened

A semiconductor wafer is cleansed of loose foreign surface matter and chemical impurities near the surface in an apparatus which passes superheated steam over the wafer. Condensate is permitted to form and drip off the wafer. After rising above 100.degree. C the wafer becomes dry, and is removed from the apparatus and then permitted to cool.

Apparatus and method for cleaning and drying semiconductors

Instabilities in the leakage current and threshold voltage of a field effect transistor on an insulator substrate, at both room temperature and after operation at relatively high temperatures (150.degree. C), are substantially reduced by selectively doping edge regions adjacent the transverse side surfaces of the channel region of the field effect transistor, wherein the breakdown voltage of the channel-to-drain junction is substantially increased. Atoms are placed in these edge regions to provide therein a carrier concentration of at least 5 .times. 10.sup.16 atoms-cm.sup.-3 of the opposite conductivity type to that of the source and drain regions. The doped edge region extends partly across said channel region and extends fully across the side surface at the end of the source region.

Silicon-on-sapphire mesa transistor having doped edges

An MOS mesa transistor wherein the sidewalls of the mesa are electrically isolated from a device formed on the principal surface of the mesa, is provided. The mesa is comprised of a source and a drain which do not extend to a sidewall of the mesa. The source and the drain are surrounded by a band of semiconductor material which is a portion of the mesa and which electrically isolates the source and the drain from the sidewalls of the mesa.

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Mercerville, NJ, United States of America

William Edward Ham