International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

William Edward Atherton

Eric Richard Kern

Marcus Alan Baker

Tara Lynn Astigarraga

Michael E Browne

Richard Alan Dayan

William Joseph Piazza

Gregory Joseph McKnight

Scott Neil Dunham

William Bradley Schwartz

Howard J Locker

Daryl Carvis Cromer

Thomas Anthony Gregg

Randal Lee Bertram

Jimmy Grant Foster, Sr

Robert Russell Wolford

Jeffrey Buchanan Williams

Tu T Dang

Michael Charles Elles

Adam Lee Soderlund

Fernando Aramis Lopez

Paul Joseph Mattos

Dustin Patterson

David James Rudda, Jr

Sandra Rhodes

David C Wu

Paul L Anderson

Sreekanth Konireddygari

Raghunath Reddy Kallem

A method includes running an application on a mobile computing device, the mobile computing device accepting biometric input, and the mobile computing device enabling one or more function of the application only in response to the biometric input indicating that more than one person is present in the same location. Examples of suitable biometric input include a fingerprint, heartbeat, iris scan, facial recognition, and voice recognition. The biometric input may be provided directly to the mobile computing device from the more than one person present, or the biometric input may be provided by a first person to a first mobile computing device and by a second person to a second mobile computing device.

Enabling application functions responsive to biometric input from more than one person

For optimizing expansion devices on a computer expansion bus based on real-time flow control data, a system, apparatus, method, and computer program product are disclosed. The apparatus includes a configuration module that initializes a plurality of expansion bus registers, each expansion bus register associated with one of the plurality of expansion bus slots, a packet module that monitors flow control packets on the expansion bus, a flow control module that calculates flow control data from the flow control packets, the flow control data relating to the plurality of expansion devices, and a register module that writes flow control data to the plurality of expansion bus registers. The apparatus may further includes an optimization module that calculates an arrangement of the plurality of expansion devices, based on the flow control data, to maximize expansion bus throughput.

PCI-E real-time flow control optimization

Embodiments of the invention address deficiencies of the art in respect to memory fault tolerance, and provide a novel and non-obvious method, system and apparatus for single channel memory mirroring. In one embodiment of the invention, a single channel memory mirroring system can be provided. The single channel memory mirroring system can include a memory controller, a single communications channel, and an operational data portion of memory, and a duplicate data portion of memory, both portions being communicatively coupled to the memory controller over the single communications channel. Finally, the system can include single channel memory mirror logic. The logic can include program code enabled to mirror data in the operational data portion of memory in the duplicate data portion of memory.

Single channel memory mirror

Methods, apparatuses, and computer program products of extending cache in a multi-processor computer are provided. Embodiments include detecting, by a donor processor, nonuse of a donor processor's cache; broadcasting to one or more processors in the multi-processor computer, by the donor processor, a donor-ready message indicating the donor processor's cache is available for ownership transferment; receiving from a first requesting processor, by the donor processor, a first ownership-request message requesting ownership of the donor processor's cache by the first requesting processor; transmitting to the first requesting processor, by the donor processor, an ownership-grant message indicating an intention of the donor processor to transfer ownership of the donor processor's cache to the first requesting processor; and receiving from the first requesting processor, by the donor processor, an ownership-claim message indicating that the first requesting processor intends to claim ownership of the donor processor's cache.

Extending cache in a multi-processor computer

A computer program product and system for managing allocation of storage in a switch utilizing flow control are provided. The switch includes a plurality of ports and an internal storage divided into a plurality of storage units. The computer program product and system provide for monitoring an average number of storage units used by each of the plurality of ports over a predetermined time period, setting a threshold for the average number of storage units used by each of the plurality of ports, and allocating one or more available storage units assigned to a first port to a second port in response to storage allocation management being enabled for the second port and the average number of storage units used by the second port exceeding the threshold for the second port.

Storage allocation management in switches utilizing flow control

A method and computer program product for improving or optimizing the configuration of expansion cards and expansion card slots in a computer system. The slot width of each slot is serially set to two or more link widths supported by the expansion card that is connect in each slot and each of the plurality of expansion cards is retrained at each of the set slot widths. The current link speed and a current link width for each of the plurality of expansion cards may be identified at each of the set slot widths to enable a determination of a configuration of the plurality of expansion cards within the plurality of expansion card slots that will improve collective throughput of the expansion cards. Optionally, the throughput of one expansion card may be prioritized over the throughput of another expansion card, such as those expansion cards or functionalities specified by user preferences or identified by system monitoring of loads placed on the expansion cards.

System reconfiguration of expansion cards

Operating system ('OS')-firmware interface update recovery including determining, for each of a plurality of available OS-firmware interface images for booting a computer, whether each available OS-firmware interface image is corrupted or uncorrupted; setting, for each corrupted OS-firmware interface image, a predictive failure analysis ('PFA') bit in nonvolatile memory available to the OS-firmware interface update recovery module; selecting an uncorrupted OS-firmware interface image; initiating a boot for the computer with the selected OS-firmware interface image; determining whether a previous update to one of the available OS-firmware interface images was interrupted; and notifying a user that the previous update was interrupted if the previous update to one of the available OS-firmware interface images interrupted.

Operating system-firmware interface update recovery

Disclosed are a method, electronic device, and computer readable medium for determining an end-of-life stage of the flash memory. The method includes detecting at least one life cycle event associated with a flash memory residing on an electronic device. A counter that is associated with the life cycle event is then incremented. Based on the counter, a total number of occurrences for the one life cycle event is determined. The total number of occurrences for the at least one given threshold is also determined. A current life cycle stage of the flash memory is identified based at least in part on determining if the total number of occurrences exceeds at least one given threshold. The life cycle stage is associated with the at least one given threshold. A user is then notified of the life cycle state of the flash memory.

End of life prediction of flash memory

A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for dynamically allocating lanes to a plurality of PCI Express connectors is disclosed that include identifying whether a PCI Express device is installed into each PCI Express connector, and assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector. Dynamically allocating lanes to a plurality of PCI Express connectors may also include identifying a device type for each PCI Express device installed into the plurality of PCI Express connectors, creating allocation rules that specify the allocation of lanes to the plurality of PCI Express connectors, and receiving user allocation preferences that specify the allocation of lanes to the plurality of PCI Express connectors.

Structure for dynamically allocating lanes to a plurality of PCI express connectors

Methods, systems, and apparatus are disclosed for throttling a point-to-point, serial I/O expansion subsystem within a computing system that include: receiving, by a link configuration module, an external environmental parameter value representing a condition of an environment external to the computing system; determining, by the link configuration module, a link configuration of a communication link for an I/O adapter in a point-to-point, serial I/O expansion subsystem within the computing system in dependence upon the external environmental parameter value; and configuring, by the link configuration module, the communication link for the I/O adapter in dependence upon the link configuration.

Throttling a point-to-point, serial input/output expansion subsystem within a computing system

Method and system for repairing memory failure in a computer system in one aspect determines one or more test patterns and time duration for testing the new memory unit that replaced a failed memory unit. The test pattern is written to the new memory unit and read from the new memory unit. The read pattern is compared to the test pattern that was used to write. If the read test pattern and the written test pattern doe not match, a further repair action is taken. If they match, writing and reading of the test pattern repeats until the time duration for testing expires. The new memory unit may be configured as available for use when the write and read test completes successfully for the testing time duration.

Method, apparatus and program product to concurrently detect, repair, verify and isolate memory failures

Method, apparatus, and computer program products for dynamically allocating lanes to a plurality of PCI Express connectors are disclosed that include identifying whether a PCI Express device is installed into each PCI Express connector, and assigning a portion of the lanes to each PCI Express connector having a PCI Express device installed into the PCI Express connector. Dynamically allocating lanes to a plurality of PCI Express connectors may also include identifying a device type for each PCI Express device installed into the plurality of PCI Express connectors. Dynamically allocating lanes to a plurality of PCI Express connectors may also include creating allocation rules that specify the allocation of lanes to the plurality of PCI Express connectors. Dynamically allocating lanes to a plurality of PCI Express connectors may also include receiving user allocation preferences that specify the allocation of lanes to the plurality of PCI Express connectors.

Dynamically allocating lanes to a plurality of PCI express connectors

Embodiments of the invention address deficiencies of the art in respect to boot ROM handling and provide a method, system and computer program product for optimized boot ROM handling for I/O devices. In one embodiment of the invention, a ROM scan area optimization method can be provided. The method can include pre-processing multiple boot ROM images to determine memory space requirements in the ROM scan area for all of the boot ROM images. The method further can include partitioning the ROM scan area into multiple, different static portions and at least one dynamic paged portion. Finally, the method can include generating an optimal arrangement of the boot ROM images defining placement of some of the boot ROM images in corresponding ones of the static portions, and others of the boot ROM images in the dynamic paged portion.

Boot read-only memory (ROM) configuration optimization

An apparatus, system, and method are disclosed for accessing system information. The apparatus includes an observation module, a monitoring module, and an action module. The observation module receives input device signals. The monitoring module recognizes selected inputs from among input data. The action module, working independently of the local system, selectively or automatically causes system information or action to be conveyed to a user.

Growing community of inventors

Hillsborough, NC, United States of America

William Edward Atherton