Ampex Systems Corporation

William E Ryan

A novel circuit arrangement decodes Miller-squared (M.sup.2) encoded signals using Class II partial response (PR2) equalization techniques. The circuit arrangement utilizes a maximum-likelihood sequence estimator (detector) implemented by the Viterbi algorithm to minimize the probability of bit errors in a digital storage or transmission channel that employs M.sup.2 encoding in combination with PR2 equalization. The PR2 equalization channel is preferably modeled by a finite impulse response (FIR) filter which, in turn, is modeled by a finite-state trellis diagram. This allows creation of a modified trellis when M.sup.2 encoding is applied to the PR2 channel with the modified trellis providing the basis for implementing the detector according to the invention.

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Las Cruces, NM, United States of America

William E Ryan