Cherry Semiconductor Corporation

William E Headen, Jr

Stephen S Yole

An error detection circuit having an output transistor of one conductivity type and a sense transistor and error detector transistor of an opposite conductivity type. An input voltage is provided at the collector of the output transistor and an output voltage is taken from the emitter of the output transistor. An emitter of the sense transistor is connected to the input voltage and the collector of the sense transistor is connected to the base of the output transistor. An emitter of the error detector transistor is connected to the collector of the sense transistor and a base of the error detector transistor is connected to the base of the sense transistor. The error detector transistor conducts when the sense transistor saturates indicating that the input voltage and output voltage have come within a predetermined voltage of one another.

Error detector circuit for indication of low supply voltage

A high speed logic gate is disclosed in which the voltage across the output transistor is clamped by a diode, a current switch transistor, a resistor connected between the diode and the transistor and a resistor connected to ground. A selectable high impedance is provided to enable the output of the logic gate to simulate an open collector output.

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North Kingstown, RI, United States of America

William E Headen, Jr