International Business Machines Corporation

State University of New York

Leidos, Inc.

Crysta-lyn Chemical Company, Inc.

William E Bernier

John Ulrich Knickerbocker

Michael A Gaynes

Mukta G Farooq

Mark Vincent Pierson

Irving Memis

Wayne E Jones

Son K Tran

Ajit Kumar Trivedi

Marie S Cole

Tasha E Lopez

David J Welsh

Timothy Harrison Daubenspeck

Charles Gerard Woychik

David L Questad

Wayne John Howell

Donald W Henderson

Virendra R Jadhav

Valerie A Oberson

David E Eichstadt

James Spalik

Kenneth H Skorenko

Hussain Shaukatuallah

Bing Dang

John Anthony Fitzsimmons

Roger Allan Quon

Eric A Johnson

Mario John Interrante

Lewis Sigmund Goldmann

Tien-Jen Cheng

Jian Qiang Liu

Charles F Carey

Jared B DeCoste

Robert F White

Pierre M Langevin

Isabelle Paquin

Eberhard B Gramatzki

Edward G Bundga

Megan Fegley

Bradley Galusha

Francis D Goroleski

Thomas R Homa

Julia B Tollin

Danielle McCarthy

Emilly Obuya

Claude Louis Bertin

William R Tonti

Erik L Hedberg

Anilkumar Chinuprasad Bhatt

Janak G Patel

Jerzy Maria Zalesinski

Rajneesh Kumar

Peter Slota, Jr

Robert J Twieg

Paul A Totta

Edmond Otto Fey

Marcus E Interrante

Paul L Gendler

Chenzhou Lian

Nikhil Mohan Murdeshwar

Joseph J Van Horn

Charles R Pigos, Jr

Francis Emmi

Nicholas A Ravvin

Mixed-phase TiOnanofibers prepared via a sol-gel technique followed by electrospinning and calcination are provided as photocatalysts. The calcination temperature is adjusted to control the rutile phase fraction in TiOnanofibers relative to the anatase phase. Post-calcined TiOnanofibers composed of 38 wt % rutile and 62 wt % anatase exhibited the highest initial rate constant of UV photocatalysis. This can be attributed to the combined influences of the fibers' specific surface areas and their phase compositions.

Metal oxide nanofibrous materials for photodegradation of environmental toxins

An interposer sandwich structure includes a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes an attachment for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.

Silicon interposer sandwich structure for ESD, EMC, and EMC shielding and protection

A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.

A symmetrical, flat laminate structure used to minimize variables in a test structure to experimentally gauge white bump sensitivity to CTE mismatch is disclosed. The test structure includes a flat laminate structure. The method of using the test structure includes isolating a cause of a multivariable chip join problem that is adversely impacted by warpage and quantifying a contribution of the warpage, itself, in a formation of the multivariable chip join problem.

Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity

Compositions for increasing the thermal stability of optical absorbers are provided as well as methods of making and using the resulting compositions. The compositions or complexes of the present teachings generally include an optical absorber bound to a metal or a metal oxide through one or more linkers, which contain a metal binding moiety.

Increased thermal stabilization of optical absorbers

Embodiments of films and material layers comprising PEDOT. These embodiments are the result of methods that utilize polymerization processes including vapor phase polymerization (VPP) to form the conductive film comprising PEDOT. In one embodiment, the film can result from a method that includes steps for depositing a coating solution onto a substrate, exposing the substrate to a monomer source, and cleaning the substrate after polymerization. The coating solution can comprise an initiating oxidant, which facilitates growth of PEDOT from 3,4 ethylenedioxythiophene (EDOT), as well as a quenching agent that neutralizes acid that results from polymerization.

Conductive films and devices comprised thereof

An array of solder balls is attached to solder pads of one of a first substrate and a second substrate. After aligning the array of solder balls relative to solder pads of the other of the first substrate and the second substrate, a thermal-mass-increasing fixture is placed on a surface of the second substrate to form an assembly of the first substrate, the second substrate, and the array of the solder balls therebetween, and the thermal-mass-increasing fixture. The thermal-mass-increasing fixture is in physical contact with at least a surface of a periphery of the second substrate. The thermal-mass-increasing fixture reduces the cool-down rate of peripheral solder balls after a reflow step, thereby increasing time for deformation of peripheral solder balls during the cool-down and reducing the mechanical stress on the solder balls after the cool-down.

Uniform solder reflow fixture

Disclosed is a method of forming an integrated circuit structure that forms lead-free connectors on a device, surrounds the lead-free connectors with a compressible film, connects the device to a carrier (the lead-free connectors electrically connect the device to the carrier), and fills the gaps between the carrier and the device with an insulating underfill.

Compressible films surrounding solder connectors

Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.

Low stress conductive polymer bump

A method of forming compliant electrical contacts includes patterning a conductive layer into an array of compliant members. The array of compliant members is then positioned to be in contact with electrical connection pads on an integrated circuit wafer and the compliant members are joined to the pads. Then, the supporting layer that supported the compliant members is removed to leave the compliant members connected to the pads.

Compliant electrical contacts

Growing community of inventors

Endwell, NY, United States of America

William E Bernier