Formfactor, Inc.

William D Smith

Igor Y Khandros

Gaetan L Mathieu

Benjamin N Eldridge

Thomas H Dozier, Ii

Sung Chul Chang

Benjamin N Eldridge, Jr

Thomas H Dozier

An interconnection apparatus and a method of forming an interconnection apparatus. Contact structures are attached to or formed on a first substrate. The first substrate is attached to a second substrate, which is larger than the first substrate. Multiple such first substrates may be attached to the second substrate in order to create an array of contact structures. Each contact structure may be elongate and resilient and may comprise a core that is over coated with a material that imparts desired structural properties to the contact structure.

Contact carriers (tiles) for populating larger substrates with spring contacts

A plurality of contact elements, such as contact bumps or free-standing spring contacts including both monolithic and composite interconnection elements, are mounted to relatively small tile substrates which, in turn, are mounted and connected to a relatively large electronic component substrate, thereby populating the electronic component with a plurality of contact elements while avoiding the necessity of yielding the contact elements directly upon the electronic component. The relatively large electronic component is suitably a space transformer component of a probe card assembly. In this manner, pressure connections can be made to an entire semiconductor wafer, at once, to provide for wafer-level burn-in, and the like. Solder balls, z-axis conductive adhesive, or compliant connections are suitably employed for making electrical connections between the tile substrates and the electronic component. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the tiles can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described. Techniques for maintaining a prescribed x-y and z-axis alignment of the tiles to the relatively large substrate are disclosed.

A process for providing a plurality free-standing resilient contact structures (spring elements) mounted to a surface of a carrier substrate. The carrier substrate is mounted to a surface of a semiconductor device, or one or more unsingulated semiconductor dies. Bond pads of the semiconductor device are connected to the spring elements by bond wires extending between the bond pads and terminals associated with the spring elements. The carrier substrate is mounted to one or more semiconductor devices prior to the semiconductor devices being singulated from a semiconductor wafer upon which they are formed Resilience and compliance to effect pressure connections to the semiconductor device are provided by the spring elements extending from the carrier substrate, per se.

Process of mounting spring contacts to semiconductor devices

A plurality of free-standing resilient contact structures (spring elements) are mounted to a surface of a carrier substrate. The carrier substrate is mounted to a surface of a semiconductor device, or one or more unsingulated semiconductor dies. Bond pads of the semiconductor device are connected to the spring elements by bond wires extending between the bond pads and terminals associated with the spring elements. The carrier substrate is mounted to one or more semiconductor devices prior to the semiconductor devices being singulated from a semiconductor wafer upon which they are formed. Resilience and compliance to effect pressure connections to the semiconductor device are provided by the spring elements extending from the carrier substrate, per se. The carrier substrate is pre-fabricated, by mounting the spring elements thereto prior to mounting the carrier substrate to the semiconductor device(s), or vice-versa.

Chip-scale carrier for semiconductor devices including mounted spring

The invention relates to making temporary, pressure connections between electronic components and, more particularly, to techniques for performing test and burn-in procedures on semiconductor devices prior to their packaging, preferably prior to the individual semiconductor devices being singulated from a semiconductor wafer.

Growing community of inventors

Sun Lakes, AZ, United States of America

William D Smith