Silicon Graphics, Incorporated

William D Schwaderer

Kianoosh Naghshineh

Desmond W Young

A high performance shared-bus signal detection mechanism comprises a plurality of access event registers, an address comparator, an event masking component, and a local processor access detector. The comparator component couples to a bus providing access to a shared memory address space. The bus can be used by a single processor or shared by a plurality of processors. A processor loads the address event registers with address base and extent values and type of access notification desired. As addresses and access-type signals appear on the bus, the comparator simultaneously compares the bus information to access event register information to determine if the bus access meets access event register criteria. When matches occur, the comparator emits an appropriate signal to an event masking component. The local processor also loads the event masking component to selectively mask off unwanted event notifications as well as those performed by itself. The event masking component emits signals which feed a general-purpose or special-purpose processors such as interrupt controllers.

Growing community of inventors

San Jose, CA, United States of America

William D Schwaderer