Broadcom Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies International Sales Pte. Limited

Aquantia Corporation

William Calvin Woodruff

Alan Y Kwentus

Wael William Diab

Scott R Powell

Hossein Sedarat

Ozdal Barkan

Chung Ming Tu

Chao Kun Lin

Richard Dale Tidstrom

A transceiver, a communication system and an associated method thereof for reducing overall power consumption and complexity of the transceiver that operates over short reach twisted pair cables. The analog front end (AFE) of the transceiver communicates over at least one twisted pair that is configured only for transmission of data streams and communicates over at least one twisted pair that is only for reception of data streams. The transceiver includes circuitry that generates multiplexed and demultiplexed data streams for communication with the analog front end. Additionally, the transceiver utilizes at least certain portions of signal processing circuitry and AFE of a 10 GBASE-T transceiver or the like.

Low power twisted pair coding scheme

A multi-chip module (MCM) may include a substrate, and first and second physical-layer (PHY) chips mounted on the substrate. In some implementations, the first PHY chip includes a multiplexer and a PHY circuit. The multiplexer is configured to receive a multiplexed data stream from a media access control (MAC) device, to demultiplex the multiplexed data stream into first and second data streams, to output the first data stream to the PHY circuit, and to output the second data stream to the second PHY chip. In some implementations, the first PHY includes a router and a PHY circuit. The router is configured to receive a plurality of data packets from a MAC device, to route one or more of the data packets having a first address to the PHY circuit, and to route one or more of the data packets having a second address to the second PHY chip.

Multi-chip module with a high-rate interface

An apparatus for operating a low data-rate (LDR) link and legacy switch at a high data-rate (HDR) includes a first block and a second block. The first block receives input signals from the legacy switch and generates identical output signals. The second block receives the identical output signals and generates an HDR signal for communication over the LDR link coupled to an access point. Further, a media access control (MAC) interface communicates data at a first data rate with an Ethernet PHY block including a first-in-first-out (FIFO) module and a buffer. The FIFO receives data from the MAC interface at the first data rate and transmits data at a second data rate. The buffer receives data from the Ethernet port at the second data rate and transmits the received data at the first data rate in response to detection of an end of packet.

Attachment unit interfaces for non-identical data rate links

Method for implementing a multi-chip module with a high-rate interface

A system and method for next generation BASE-T communication. Next generation BASE-T devices designed for communication over twisted pair Ethernet cabling are configurable based on the characteristics of the communication channel. In discovering the characteristics of the communication channel, the physical layer device (PHY) can select one of a plurality of operating modes that can support a given data transmission rate (e.g., 10 Gbit/s, 40 Gbit/s, 100 Gbit/s, 400 Gbit/s, etc.).

System and method for next generation BASE-T communication

Aspects of a method and system for a high-speed backward-compatible Ethernet connector are provided. Which, if any, of a plurality of pins of a connector are coupled to a first portion of one or more circuits of an Ethernet PHY may be controlled via one or more switching elements in the Ethernet PHY. The switching element(s) may reside in a signal path between the first portion of the one or more circuits and a second portion of the one or more circuits. One or more configurations of the switching element(s) may couple less than all of the plurality of pins to the first circuit(s). Each signal into and out of the switching element(s) may be a digital signal. The first portion of the one or more circuit may comprise a media independent interface. The second portion of the one or more circuit may comprise a media dependent interface.

Method and system for a high-speed backward-compatible ethernet connector

Low-power idle mode for network transceivers. In one aspect, a method for reducing power consumption of a transceiver connected to a communication network includes entering a low-power idle mode, and in this mode, repeatedly turning off a transmitter of the transceiver and turning on the transmitter according to a pattern, where the pattern has been customized based on characteristics of the receiver. Turning off the transmitter conserves power consumed by the transceiver.

Growing community of inventors

Pleasanton, CA, United States of America

William Calvin Woodruff