International Business Machines Corporation

Other

William C Ward

Douglas W Phelps, Jr

Stephen G Starr

Edward John Dombroski

Sigvart J Samuelsen

H Ward Conru

Robert J Marks

Gary H Irish

William J Slattery

Francis J Pakulski

Douglas L Lumbra

Gordon C Osborne, Jr

Marvin L Buller

Robert J Redmond

Friedrich A Karner

Richard P Pashby

Barnee M Escott

Jerald J Reynolds

Stephen E Gons

A platform carries an integrated circuit (IC) (20) for handling and alignment through wire bonding operations, provides interconnections, and supports the shielded IC with uniform, controlled adhesive thickness. The platform base (10) has a flat portion which may have a slot (30) extending the length of a chip with wire-bond pads (140). The IC is mounted to the platform base with cast or contained adhesive, epoxy, or tape (50), which provides at least one adhesive surface. For several rows of wire-bond pads, there may be several slots. If the platform carries more than one chip, the platform base may have one or more slots (30, 40) per chip. A platform may carry other components (110, 120). Circuitry (90) may be printed on one or both sides of the platform base, with moderate resistivity to damp ringing of noise signals. Wire bonds are made through the slot (30), connecting IC pads with circuitry. The platform base may have conductive areas (90) on one or both sides to provide a shield or bus connected by wire bonds. Conductive bus elements (60 and 70) may be attached with tape (80). The platform may have terminals (100) for interconnection with higher level of circuitry and/or narrow leads (1220) extending over the IC. The platform base may be formed of metal, stamped in a continuous strip consisting of many individual platform segments, the individual segments being excised during assembly.

Tape application platform and processes therefor

A platform carries an integrated circuit (IC) (20) for handling and alignment through wire bonding or TAB operations, provides interconnections, and supports the shielded IC with uniform, controlled adhesive thickness. The platform base (10) has a flat portion which may have a slot (30) extending the length of a chip with wire-bond pads (140). The IC is mounted to the platform base with cast or contained adhesive, epoxy, or tape (50), which provides at least one adhesive surface. For several rows of wire-bond pads, there may be several slots. If the platform carries more than one chip, the platform base may have one or more slots (30, 40) per chip. A platform may carry other components (110, 120). Circuitry (90) may be printed on one or both sides of the platform base, with moderate resistivity to damp ringing of noise signals. Wire bonds are made through the slot (30), connecting IC pads with circuitry. The platform base may have conductive areas (90) on one or both sides to provide a shield or bus connected by wire bonds. Conductive bus elements (60 and 70) may be attached with tape (80). The platform may have terminals (100) for interconnection with higher level of circuitry and/or narrow leads (1220) extending over the IC. The platform base is preferably made from epoxy-glass laminate with conductive layers of a clad composite with preferred resistivity and preferred thermal expansion. Platform bases may be composite metal, stamped in a continuous strip, with platform segments excised during assembly. Another embodiment provides a lead paddle assembly in which two tape application platforms hold an IC in a rigid assembly.

An integrated-circuit manufacturing process uses a platform to carry an integrated circuit (IC) (20) for handling and alignment through wire bonding or TAB operations, to provide interconnections, and to support the shielded IC with uniform, controlled adhesive thickness. The platform base (10) has a flat portion which may have a slot (30) extending the length of a chip with wire-bond pads (140). The IC is mounted to the platform base with cast or contained adhesive, epoxy, or tape (50), which provides at least one adhesive surface. For several rows of wire-bond pads, there may be several slots. If the platform carries more than one chip, the platform base may have one or more slots (30, 40) per chip. A platform may carry other components (110, 120). Circuitry (90) may be printed on one or both sides of the platform base, with moderate resistivity to damp ringing of noise signals. Wire bonds are made through the slot (30), connecting IC pads with circuitry. The platform base may have conductive areas (90) on one or both sides to provide a shield or bus connected by wire bonds. Conductive bus elements (60 and 70) may be attached with tape (80). The platform may have terminals (100) for interconnection with higher level of circuitry and/or narrow leads (1220) extending over the IC. The platform base is preferably made from epoxy-glass laminate with conductive layers of a clad composite with preferred resistivity and preferred thermal expansion. Platform bases may be composite metal, stamped in a continuous strip, with platform segments excised during assembly. Another embodiment provides a lead paddle assembly in which two tape application platforms hold an IC in a rigid assembly.

A platform serves to carry an integrated circuit chip (20) for handling and alignment through wire bonding or TAB operations, provides interconnections, and supports the IC chip in its use environment. The platform base (10) has a flat portion which may have a slot (30) passing through it and extending approximately the length of an IC chip (which has wire-bond pads (140), some of which may be near a chip axis). The IC chip is mounted to the platform base with tape (50), which provides at least one adhesive surface. The tape may be a cast or contained adhesive or epoxy with or without a backing layer, or it may be a thermoplastic or thermo-setting plastic. TAB or wire-bond pads are aligned with respect to the platform slot. If the chip has more than one row of wire-bond pads, the platform may have more than one slot. If more than one chip is mounted to the platform, the platform's base may have one or more slots (30, 40) per chip. Circuitry (90) may be printed on one or both sides of the platform base. The circuitry is preferably made to have a relatively high sheet resistivity to damp ringing of noise signals. Wire bonds are made through the slot (30), connecting pads on the IC chip with printed circuitry. The platform base may have an electrically conductive area (90) on one or both sides to provide a shield, ground plane and/or power bus, connected by wire bonds to pads of the IC chip and to a higher level of circuitry. Conductive bus elements (60 and 70) having continuous wire-bond areas may be provided, attached with tape (80). The platform may have terminals (100) for interconnection with a higher level of circuitry and/or narrow leads (1220) extending over the IC chip. Components (110, 120) other than the integrated circuit chip may also be carried on the tape application platform.

This is a semiconductor chip in which the conductive path between the chip and the lead frame via wires can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point. This is accomplished by placing an insulating layer on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires. The insulating layer is a thermosetting adhesive and is placed over the lead frame, the bonding wires and the active face of the semiconductor chip so that when a lamination force is applied to the insulating layer the wires will be crushed and held against their respective pads and against the respective leads to which they are connected and the active face of the semiconductor protected by the adhesive bonding thereto. In this way greater contact between the wires and the leads is enhanced and defects or failure in conductivity therebetween reduced or eliminated.

Planarized thin film surface covered wire bonded semiconductor package

A method of making a semiconductor chip in which the conductive path between the chip and the lead frame via wires can be easily and reproduceably improved. This is accomplished by improving the bond between the wires and the lead frame members to which the wires are joined and by creating additional contacts between each wire and its respective lead even if the bonded contact breaks or fails at or immediately adjacent to the bonding point. This is accomplished by placing an insulating layer on the active surface of each chip, carrying input and output bonding pads thereon, to which lead frame conductors have been connected by bonding wires. The insulating layer is a thermosetting adhesive and is placed over the lead frame, the bonding wires and the active face of the semiconductor chip so that when a lamination force is applied to the insulating layer the wires will be crushed and held against their respective pads and against the respective leads to which they are connected and the active face of the semiconductor protected by the adhesive bonding thereto. In this way greater contact between the wires and the leads is enhanced and defects or failure in conductivity therebetween reduced or eliminated.

Method of making a planarized thin film covered wire bonded

A plastic encapsulated semiconductor package in which the connecting lead frame members are deposited over the surface of the device together with a covering ground plane so as to provide enhanced electrical and thermal coupling of the members and the device and so reduce the signal to noise ratio by a factor or greater than three over that available in other similar plastic encapsulated packages while simultaneously improving the transfer of heat out of the package. In particular, a lead frame having a plurality of conductors is attached to a major active surface of a semiconductor chip via a ground plane which, in the preferred embodiment, is a multilayered structure containing an insulated integral, uniform ground plane positioned between the lead frame and the chip and adhesively and insulatively joined to both of them. Wires connect terminals on the major active surface of the semiconductor chip to the ground plane and to selective lead frame conductors. The lead frame, the ground plane structure, the semiconductor chip, and the wires which connect the semiconductor chip terminals to the ground plane and to selected lead frame conductors are encapsulated with a suitable insulating material to form a semiconductor module or package.

Semiconductor package with ground plane

In an encapsulated semiconductor module in which a semiconductor chip, having a major surface with terminals thereon, is deposed within the encapsulating material, a plurality of self-supporting, unitary, discrete, and continuous lead frame conductors formed of metal sheet stock are positioned at various locations around the chip and cantilevered out of the encapsulating material, so that discrete wires can be used to connect respective ones of said conductors to respective ones of said terminals. In the present invention excessively long bonding wires are avoided by connecting a selected one of said lead frame conductors to a parallel conductor by a jumper wire and connecting the parallel conductor to the desired terminal with a short wire.

Semiconductor package

A compression bond is formed between a gold or gold alloy wire and lead/tin solder by forming a head on the wire and forcing the head into a pad of the solder by thermosonic, or thermocompression, or ultrasonic compression bonding techniques. This forms a gold/tin intermetallic compound which in turn forms the bond. The head of the wire is maintained out of contact with any underlying surface, and surrounded by the solder.

Method of bonding gold or gold alloy wire to lead tin solder

A package for heat dissipation of electronic components mounted on a strip of thermally conductive material. A plastic body is molded to encapsulate the component and strip with extended mold ejector pins employed to form a recess such that access to the thermally conductive strip is obtained. An external heat sink is mounted onto the plastic body. A clip or through bolt establishes thermal contact between the external heat sink and the internal thermally conductive strip.

Heat dissipation package for integrated circuits

The present invention is directed to a packaged semiconductor chip which effectively dissipates heat and has improved performance. The packaged chip has a plurality of lead frame conductors extending through the encapsulating material which are adhesively joined to the semiconductor chip, preferably by means of an alpha barrier. The conductors cover a substantial portion of the surface of the chip and thereby serve as conduits for the dissipation of heat from the chip. Wires are bonded to the conductors and extend from the conductors to the terminals on the semiconductor chip. In a preferred embodiment the semiconductor chip terminals are located along a center line of the chip. This allows for short connecting wires which in turn contribute to faster chip response.

Package semiconductor chip

An electronic assembly having a semiconductor device back bonded to a first lead frame. An adhesive insulative tape is placed on the first lead frame and the device. A second lead frame is mounted on the adhesive tape. Electrical contacts by wire bonds are established between the device and the first and second lead frames.

Peripheral/area wire bonding technique

An improved thermal management technique is disclosed for use in semiconductor device packaging utilizing ultrasonic welding to attach aluminum wires of predetermined diameter at one end directly to preselected hot spots on the device and at the other end to thermally conductive package elements.

Welded wire cooling

A method of forming semiconductor devices wherein a continuous metallic sheet is cut under computer control into a personalized lead pattern. The pattern is then moved to a bonding station. A bonding tool actuated by computer control moves from one terminal end to another to sequentially bond terminals to the semiconductor device. A variety of various patterns and chips can be handled on the same line using common cutting and bonding tools. A second bond can be made from the lead pattern to either a lead frame or a substrate.

Highly integrated universal tape bonding

A novel substrate is disclosed which can mount either flip-chip solder bonded IC chips or wire bonded chips, or both chips, or a single chip having both solder bonds and wire bonds is disclosed. The substrate has an array of solder pads which will accept solder bonds. Those pads which are to be used for wire bonding have mounted thereon a trimetallic pedestal. Each pedestal has a layer of solder metal bonded to the solder pad, a top layer metal suitable for wire bonding, such as, aluminum or gold, and an intermediate layer of metal, such as nickel, which is impervious to both solder metal and the top layer metal.

Growing community of inventors

Burlington, VT, United States of America

William C Ward