Innovium, Inc.

Broadcom Corporation

Marvell Asia Pte., Ltd.

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies International Sales Pte. Limited

Other

William Brad Matthews

Puneet Agarwal

Bruce Hui Kwan

Ajit Kumar Jain

Rupa Budhia

Meg Pei Lin

Mohammad Kamel Issa

Avinash Gyanendra Mani

Neil Barrett

Paul Kim

Kapil Vishwas Shrikhande

Amit Kumar

Vahid Tabatabaee

Bruce H Kwan

Mohan V Kalkunte

Ashwin Alapati

David Alan Jarosh

Meg Lin

William Fan

Michael John Filardo

Patrick James Bourke

A Media Access Control Security (MACsec) core architecture implements flow control and bandwidth management when bandwidth is expanded internally due to encryption overhead and packet injection. External flow control requests are merged with internal flow control states and sent to a connected host.

MACsec architecture

Certain hash-based operations in network devices and other devices, such as mapping and/or lookup operations, are improved by manipulating a hash key prior to executing a hash function on the hash key and/or by manipulating outputs of a hash function. A device may be configured to manipulate hash keys and/or outputs using manipulation logic based on one or more predefined manipulation values. A similar hash-based operation may be performed by multiple devices within a network of computing devices. Different devices may utilize different predefined manipulation values for their respective implementations of the manipulation logic. For instance, each device may assign itself a random mask value for key transformation logic as part of an initialization process when the device powers up and/or each time the device reboots. In an embodiment, described techniques may increase the entropy of hashing function outputs in certain contexts, thereby increasing the effectiveness of certain hashing functions.

Hash operation manipulations

Path-specific delay variations in a computer communication network between a time-sensitive nexus node and time-sensitive non-nexus nodes are determined. The time-sensitive nexus node determines, based on the path-specific delay variations, copy-specific delay alignment compensations for copies of a multi-destination communication packet to be sent by the time-sensitive nexus node to the time-sensitive non-nexus nodes respectively. The time-sensitive nexus node uses the per-copy delay alignment compensations to perform per-copy delay alignment operations with respect to the copies of the multi-destination communication packet. The time-sensitive nexus node sends each copy in the copies of the multi-destination communication packet to a respective time-sensitive non-nexus node in the time-sensitive non-nexus nodes after a respective per-copy delay alignment operation in the per-copy delay alignment operations is performed for the copy of the multi-destination communication packet.

Time aligned multi-packet delivery

In response to certain events in a network device, visibility packets may be generated. A visibility packet may be or comprise at least a portion of a packet that is in some way associated with the event, such as a packet that was dropped as a result of an event, or that was in a queue at the time of an event related to that queue. A visibility packet may be tagged or otherwise indicated as a visibility packet. The network device may include one or more visibility samplers through which visibility packets are routed on their way to a visibility queue, visibility subsystem, and/or out of the network device. The samplers allow only a limited sample of the visibility packets that they receive to pass through the sampler, essentially acting as a filter to reduce the amount of visibility packets that will be processed.

Visibility sampling

Efficient scaling of in-network compute operations to large numbers of compute nodes is disclosed. Each compute node is connected to a same plurality of network compute nodes, such as compute-enabled network switches. Compute processes at the compute nodes generate local gradients or other vectors by, for instance, performing a forward pass on a neural network. Each vector comprises values for a same set of vector elements. Each network compute node is assigned to, based on the local vectors, reduce vector data for a different a subset of the vector elements. Each network compute node returns a result chunk for the elements it processed back to each of the compute nodes, whereby each compute node receives the full result vector. This configuration may, in some embodiments, reduce buffering, processing, and/or other resource requirements for the network compute node or network at large.

Massively parallel in-network compute

An improved buffer for networking and other computing devices comprises multiple memory instances, each having a distinct set of entries. Transport data units ('TDUs') are divided into storage data units (“SDUs”), and each SDU is stored within a separate entry of a separate memory instance in a logical bank. One or more grids of the memory instances are organized into overlapping logical banks. The logical banks are arranged into views. Different destinations or other entities are assigned different views of the buffer. A memory instance may be shared between logical banks in different views. When overlapping logical banks are accessed concurrently, data in a memory instance that they share may be recovered using a parity SDU in another memory instance. The shared buffering enables more efficient buffer usage in a network device with a traffic manager shared amongst egress bocks. Example read and write algorithms for such buffers are disclosed.

Spatial dispersion buffer

Link data is stored in a distributed link descriptor memory ('DLDM') including memory instances storing protocol data unit (“PDU”) link descriptors (“PLDs”) or cell link descriptors (“CLDs”). Responsive to receiving a request for buffering a current transfer data unit (“TDU”) in a current PDU, a current PLD is accessed in a first memory instance in the DLDM. It is determined whether any data field designated to store address information in connection with a TDU is currently unoccupied within the current PLD. If no data field designated to store address information in connection with a TDU is currently unoccupied within the current PLD, a current CLD is accessed in a second memory instance in the plurality of memory instances of the same DLDM. Current address information in connection with the current TDU is stored in an address data field within the current CLD.

Distributed link descriptor memory

Distributed machine learning systems and other distributed computing systems are improved by embedding compute logic at the network switch level to perform collective actions, such as reduction operations, on gradients or other data processed by the nodes of the system. The switch is configured to recognize data units that carry data associated with a collective action that needs to be performed by the distributed system, referred to herein as 'compute data,' and process that data using a compute subsystem within the switch. The compute subsystem includes a compute engine that is configured to perform various operations on the compute data, such as “reduction” operations, and forward the results back to the compute nodes. The reduction operations may include, for instance, summation, averaging, bitwise operations, and so forth. In this manner, the network switch may take over some or all of the processing of the distributed system during the collective phase.

Network switch with integrated gradient aggregation for distributed machine learning

A network device includes ingress queues for storing data units while the data units are being processed by ingress packet processors, and a plurality of egress buffer memories for storing data units received from the ingress queues while the data units are being processed by the egress packet processors. First circuitry controls respective rates at which data units are transferred from ingress queues to egress buffer memories. Second circuitry monitors the egress buffer memories for congestion and sends, to the first circuitry, flow control messages related to congestion resulting of egress buffer memories. The first circuitry progressively increases over time a rate at which data from each ingress queue are transferred to an egress buffer memory in response to receiving a flow control message that indicates that congestion corresponding to the egress buffer memory has ended.

Queue pacing in a network device

A network device obtains measurement data for one or more device attributes or environmental factors, and compares the measurement data to respective ranges specified for the device attributes or the environmental factors. Different ranges for the device attributes or the environmental factors are associated with different operating regions (OREs) classified for the device. The operating state of the network device corresponds to a first ORE of the different OREs, and various tasks performed by the device in the operating state are based on configurations specified by the first ORE. Based on comparing the measurement data, the network device identifies a second ORE that includes ranges for the device attributes or the environmental factors that match the measurement data. The network device transitions the operating state to correspond to the second ORE, and adjusting the tasks performed by the device according to configurations specified by the second ORE.

Reducing power consumption in an electronic device

Automatic load-balancing techniques in a network device are used to select, from a multipath group, a path to assign to a flow based on observed state attributes such as path state(s), device state(s), port state(s), or queue state(s) of the paths. A mapping of the path previously assigned to a flow or group of flows (e.g., on account of having then been optimal in view of the observed state attributes) is maintained, for example, in a table. So long as the flow(s) are active and the path is still valid, the mapped path is selected for subsequent data units belonging to the flow(s), which may, among other effects, avoid or reduce packet re-ordering. However, if the flow(s) go idle, or if the mapped path fails, a new optimal path may be assigned to the flow(s) from the multipath group.

Auto load balancing

When a measure of buffer space queued for garbage collection in a network device grows beyond a certain threshold, one or more actions are taken to decreasing an enqueue rate of certain classes of traffic, such as of multicast traffic, whose reception may have caused and/or be likely to exacerbate garbage-collection-related performance issues. When the amount of buffer space queued for garbage collection shrinks to an acceptable level, these one or more actions may be reversed. In an embodiment, to more optimally handle multi-destination traffic, queue admission control logic for high-priority multi-destination data units, such as mirrored traffic, may be performed for each destination of the data units prior to linking the data units to a replication queue. If a high-priority multi-destination data unit is admitted to any queue, the high-priority multi-destination data unit can no longer be dropped, and is linked to a replication queue for replication.

Multi-destination traffic handling optimizations in a network device

Packet-switching operations in a network device are managed based on the detection of excessive-rate traffic flows. A network device receives a data unit, determines the traffic flow to which the data unit belongs, and updates flow tracking information for that flow. The network device utilizes the tracking information to determine when a rate at which the network device is receiving data belonging to the flow exceeds an excessive-rate threshold and is thus an excessive-rate flow. The network device may enable one or more excessive-rate policies on an excessive-rate traffic flow. Such a policy may include any number of features that affect how the device handles data units belonging to the flow, such as excessive-rate notification, differentiated discard, differentiated congestion notification, and reprioritization. Memory and other resource optimizations for such flow tracking and management are also described.

Automatic flow management

Distributed machine learning systems and other distributed computing systems are improved by compute logic embedded in extension modules coupled directly to network switches. The compute logic performs collective actions, such as reduction operations, on gradients or other compute data processed by the nodes of the system. The reduction operations may include, for instance, summation, averaging, bitwise operations, and so forth. In this manner, the extension modules may take over some or all of the processing of the distributed system during the collective phase. An inline version of the module sits between a switch and the network. Data units carrying compute data are intercepted and processed using the compute logic, while other data units pass through the module transparently to or from the switch. Multiple modules may be connected to the switch, each coupled to a different group of nodes, and sharing intermediate results. A sidecar version is also described.

Distributed artificial intelligence extension modules for network switches

A traffic manager is shared amongst two or more egress blocks of a network device, thereby allowing traffic management resources to be shared between the egress blocks. Schedulers within a traffic manager may generate and queue read instructions for reading buffered portions of data units that are ready to be sent to the egress blocks. The traffic manager may be configured to select a read instruction for a given buffer bank from the read instruction queues based on a scoring mechanism or other selection logic. To avoid sending too much data to an egress block during a given time slot, once a data unit portion has been read from the buffer, it may be temporarily stored in a shallow read data cache. Alternatively, a single, non-bank specific controller may determine all of the read instructions and write operations that should be executed in a given time slot.

Growing community of inventors

San Jose, CA, United States of America

William Brad Matthews