Primarion Corporation

Intel Corporation

Other

William B Pohlman

Michael W Eisele

Robert T Carroll

Kenneth A Ostrom

Michael T Zhang

Benjamim Tang

Andrew M Volk

Brian Astle

David M Susak

Nicholas Robert Steffen

Keith Nelson Bassett

Clifford Duong

Timothy M Ng

Stephen P Morse

James F McKevitt, Iii

Bruce W Ravenel, Iii

A shunt voltage regulator for a processor is disposed on the processor package. The shunt voltage regulator responds to AC transients. One embodiment includes a DC power converter voltage regulator that is disposed off the processor package, and that is optimized for DC power conversion. Another embodiment includes a method of improving fabrication yield for a packaged processor.

Shunt voltage regulator and method of using

A regulator system for supplying power to a microelectronic device is disclosed. The system includes an array of a plurality of regulators, where each regulator provides a portion of power required to operate the device. The system may further include an intermediate power regulator that supplies power to the array of regulators.

Apparatus for providing regulated power to an integrated circuit

A method, apparatus, and system for providing operating power and transient suppression power to a microelectronic device are disclosed. The system includes a primary regulator to supply nominal operating power and to respond to relatively slow transient events and a transient suppression regulator to respond to fast transient power events. The system also includes a sense circuit to detect when a transient event occurs and to send a signal to the transient suppression regulator to supply or sink current to the load in response to a sensed transient power event.

Method and apparatus for providing wideband power regulation to a microelectronic device

A device for transmitting clock signals to a microprocessor is disclosed. The device is configured to receive a clock signal and distribute the signal synchronically to multiple output sites on the device. The synchronized clock signals are transmitted from the various device sites to multiple sites on the microprocessor.

Apparatus suitable for providing synchronized clock signals to a microelectronic device

Power regulation system, apparatus, and method for providing regulated power to a microelectronic device

An apparatus for providing regulated power to a microelectronic device is disclosed. The apparatus includes an array of power regulators that are coupled together and which are configured to provide power to various portions of the microelectronic device. The array includes filters to determine a frequency of power demanded by the device and transistors configured to provide power in the demanded frequency range.

Method and apparatus for distributing power to an integrated circuit

Shunt transient voltage regulator in a processor package, method of making same, and method of using same

A circuit for providing regulated power to a microelectronic device is disclosed. The circuit includes an error amplifier, a transistor, and a supplemental voltage supply coupled to the transistor. The supplemental voltage supply supplies requisite bias to operate the transistor near its saturation point.

Microelectronic current regulator

A method and apparatus for providing multiple interactive video teleconferencing sessions over a standard ISDN line is described. Multiple sets of audio, video, and data information are generated and transmitted to a bandwidth allocation device which determines what portion of that information will be transmitted over the ISDN line. Additionally, priority request values are generated that assist the bandwidth allocation device in performing its allocation function such that users interacting with the audio, video and data generation sources will experience acceptable levels of interaction even when bandwidth demand is greater than the supply.

Method and apparatus for multiple applications on a single ISDN line

The addressable memory space within the retrievable capacity of the microprocessor is necessarily limited by the bit length of the address word. This in turn, is limited by the bit length of the word which the microprocessor may compute or manipulate. By appropriate organization of multiple registers, an extended or expanded memory space may be achieved without the necessity of increasing the word length of the digital information manipulated by the microprocessor. In addition, the microprocessor can be fabricated to be capable of both eight bit and sixteen bit operation by appropriate organization and coordination of a plurality of register files. By virtue of this register file organization and coordination additional improved operations may be achieved, such as direct coupling by the microprocessor between the memory and separate dedicated data processing chips, simplified string instructions and the condensation of entire classes of instructions into single generic instruction formats.

Extended address, single and multiple bit microprocessor

An improved data transfer apparatus and method is fabricated by multiplexing at least a portion of the address of the peripherals on the data bus. Data transfer is simplified by adopting identical control timing for the read and write cycles, setting up address and data information early within a cycle and synchronizing the output of such information on the output busses coupled to the peripherals. Data transfer control signals may be encoded to simplify read and write input/output and memory operations. The advantage of such improvements permits reduce component count, pin requirements and gives rise to an ability to incorporate more system functions on a single chip.

Growing community of inventors

Phoenix, AZ, United States of America

William B Pohlman