Analog Devices,inc.

William Andrew Nevin

Paul Damien McCann

Cormac MacNamara

Colin Stephen Gormley

Graeme Peters

A semiconductor substrate () comprises first and second silicon wafers () directly bonded together with interfacial oxide and interfacial stresses minimised along a bond interface (), which is defined by bond faces () of the first and second wafers (). Interfacial oxide is minimised by selecting the first and second wafers () to be of relatively low oxygen content, well below the limit of solid solubility of oxygen in the wafers. In order to minimise interfacial stresses, the first and second wafers are selected to have respective different crystal plane orientations. The bond faces () of the first and second wafers () are polished and cleaned, and are subsequently dried in a nitrogen atmosphere. Immediately upon being dried, the bond faces () of the first and second wafers () are abutted together and the wafers () are subjected to a preliminary anneal at a temperature of at least 400&#xb0; C. for a time period of a few hours. As soon as possible after the preliminary anneal, and preferably, within forty-eight hours of the preliminary anneal, the first and second wafers () are fusion bonded at a bond anneal temperature of approximately 1,150&#xb0; C. for a time period of approximately three hours. The preliminary anneal may be omitted if fusion bonding at the bond anneal temperature is carried out within approximately six hours of the wafers () being abutted together. An SOI structure () may subsequently be prepared from the semiconductor structure () which forms a substrate layer () supported on a handle layer () with a buried insulating layer () between the substrate layer () and the handle layer ().

Method for direct bonding two silicon wafers for minimising interfacial oxide and stresses at the bond interface, and an SOI structure

A method for forming an isolation filled trench () in a silicon layer () of an SOI structure (). The trench () is relieved adjacent its open mouth () in order to displace the commencement of bridging of the trench () with the filling material, to a level () well below a first surface () of the silicon layer () for in turn displacing voids () from the open mouth () into the trench () below the level (). The trench may be relieved by forming tapered portions () in the side wells () adjacent the open mouth (), and/or by relieving one or more lining layers () in the trench () adjacent the open mouth () to form tapered portion () and (). Instead of relieving the trench () by tapering the side walls () relieving recesses may be formed into the first surface () of the silicon layer () adjacent the open mouth (). By relieving the trench () or one or more of the lining layers () adjacent the open mouth () the commencement of bridging of the trench with the filling material is displaced downwardly to a level (), which displaces voids formed in the trench below the level (). By sufficiently relieving the trench () and/or lining layers () adjacent the open mouth to a sufficient depth the formation of voids in the trench may be completely avoided.

Method for forming a filled trench in a semiconductor layer of a semiconductor substrate, and a semiconductor substrate with a semiconductor layer having a filled trench therein

A semiconductor substrate () comprising an SOI () formed therein. The semiconductor substrate () comprises first and second wafers () which are directly bonded together along a bond interface (). Prior to bonding the wafers (), a portion () of the second wafer () is ion implanted to form a p+ region for facilitating selective etching thereof to form a buried cavity (), in which a buried insulating layer is subsequently formed under a portion () of the first wafer () for forming the SOI (). After bonding of the first and second wafers () a communicating opening () is etched through the first wafer () to the bond interface (), and the selectively etchable portion () is etched through the communicating opening () to form the buried cavity (). The buried cavity () is then filled with deposited oxide to form the buried insulating layer (). An isolation trench () is formed through the first wafer () to the buried insulating layer () around the portion () for isolating the SOI () from the remainder of the first wafer ().

Method of forming a cavity and SOI in a semiconductor substrate

A composite SOI semiconductor wafer () comprises a device layer () and a handle layer () with a buried oxide layer () located between the device and handle layers (). The device and handle layers () are formed from device and handle wafers (), respectively. A peripheral ridge () extending around a first major surface () of the device wafer () adjacent the peripheral edge () thereof is removed by etching a peripheral recess () to a depth (d) into the device wafer () prior to bonding the device and handle wafers (), in order to avoid an unbonded peripheral pardon extending around the composite wafer (). The depth to which the peripheral recess () is etched is greater then the final finished thickness t of the device layer (). An oxide layer () is grown on the device water () and a photoresist layer () on the oxide layer () is patterned to define the peripheral recess (). The oxide layer () is etched leaving only a portion of the oxide layer () beneath the photoresist layer (), which subsequently forms the oxide layer (). The peripheral recess () is then etched, and the photoresist layer () is removed. The oxide layer () is fusion bonded to a first major surface () of the handle wafer () by a high temperature bond anneal. Thereafter the device layer () is machined to its final finished thickness t.

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Portadown, United Kingdom

William Andrew Nevin