Lockheed Martin Corporation

William A Hill

Dennis Lee Wilson

Elbert L Turner

Troy Pellizzer

Gary Nunes

A charge coupled device (CCD) circuit employing substrate electrical bounce compensation circuitry that is particularly useful in a cinematography digital image capture cameras. An exemplary CCD circuit comprises a CCD array having a substrate that is coupled to an output node. The output of the CCD array (substrate) is coupled to a gate input of a reset field effect transistor (FET). The output node is coupled to a source input of the reset FET. The output of the CCD array is coupled to the substrate bounce compensation circuit which provides a video pedestal reference signal for the reset FET. The substrate bounce compensation circuit includes a capacitor that capacitively coupled the output of the CCD array to the drain of the reset FET, and a resistor that resistively couples the drain of the reset FET to a reset drain bias capacitor. The substrate bounce compensation circuit thus comprises substrate feedback circuitry coupled to the output node that allows the video pedestal to track and thereby suppress substrate bounce generated through a parallel drive signal that would otherwise cause output signal interference at high frame rates.

Substrate electrical bounce compensation circuitry for digital cinematography image capture cameras

A high resolution, high frame rate digital cinematographic camera system having an improved shutter system. An exemplary digital cinematographic camera system comprises a digital camera with an image sensor, a shutter drive motor, and a double shutter system. The double shutter system comprises primary and secondary shutter blades that revolve at differential rates. A preferred double shutter comprises a 1&#xd7; rotation speed primary shutter blade with an adjustable open angle of 360 degrees minus the equivalent angle read-out time of the image sensor and a 2&#xd7; rotation speed secondary shutter blade with a fixed open angle of 360 degrees minus the effective clear aperture at the shutter plane. The 2&#xd7; rotation speed secondary shutter blade has leading and lagging edge rates that are twice the leading and lagging edge speed of the primary shutter blade to provide additional exposure time and readout time.

Differential rate double shutter for cinematographic digital image capture cameras

A high resolution, high speed digital camera that produces a high resolution image representative of an image scene viewed by the camera. The digital camera comprises an input lens system and an iris that couple light from the image scene into the camera. A first imager generates a sequence of high resolution, low speed digital frames of the image scene. A second imager generates a sequence of low resolution, high speed digital frames of the image scene. Image processing electronics process the digital outputs of the respective imagers to register the high speed and low speed digital frames to each other, generate a vector field that describes the motion of pixels from one frame to the next in the sequence of low resolution, high speed frames, and interpolate pixels of the next frame in the sequence of high resolution, low speed frames using the vector field to translate them in the same manner as the pixels changes in the low resolution, high speed frames to produce high resolution digital frames representative of the images in a scene containing objects moving at high speed.

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San Jose, CA, United States of America

William A Hill