Nxp B.v.

Willem Franciscus Slendebroek

Rodger Frank Schuttert

Tom Waayers

Geertjan Joordens

Mahmoud Abdalwahab

Certain aspects of the disclosure are directed toward test control and test access configuration via two pins on an integrated circuit (IC). According to a specific example, an IC chip-based apparatus is used in connection with a controller for testing a target IC. The IC chip-based apparatus includes an event (capture) circuit configured and arranged to control logic states through which a static test configuration is selected for a given event detected in response to a clock signal and to a data signal respectively derived from the controller. A test-operation control circuit may be configured and arranged to test the target IC by selectively configuring each of the clock pin and the I/O pin of the controller for use as an analog test bus, data input to the controller or data output from the controller, and carrying out dynamic operations by communicating test signals via pins of the target IC.

Limited pin test interface with analog test bus

A method of testing a data transmission and reception system comprises sending a test signal from a transmitter () of the system to a receiver () of the system, and analyzing the received signal. A duty cycle relationship is varied between the test signal and the timing signal used by the receiver of the system, and the effect of the duty cycle variation is analyzed. Varying the duty cycle relationship provides duty cycle distortion (DCD), and this can be considered as a form of embedded jitter insertion. This type of jitter can be measured relatively easily.

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Lent, Netherlands

Willem Franciscus Slendebroek