Deutsche Itt Industries Gmbh

Wilfried W Gehrig

Burkhard Giebel

Thomas Hilpert

Stefan Mueller

Werner Reich

Juergen Becher

A method utilizing a predetermined set of instructions in a wait routine reduces spurious signals caused by the power consumption of processors, particularly digital signal processors, which is dependent on the instruction code being executed. These spurious signals occur, for example, in processors performing cyclically recurring program routines which are initiated by interrupts where, during the run time of the routines, a first mean power consumption results, and where the run time of the program routines is shorter than the time between two successive interrupts. The cyclic changes in power consumption caused by this mode of operation of the digital signal processor are avoided by performing a wait routine between successive program routines which includes instructions selected to cause a mean power consumption of the processor during the wait routine to correspond to that during the program routines.

Method of reducing noise signals caused by fluctuations in power

A protective circuit for connecting contacts of monolithic integrated circuits, particularly CMOS input/output stages. The protective circuit has a four-layer device (ta, ts) with a defined switching threshold in the area of each connecting contact (A) and a low-resistivity current path (sa) from the connecting contact (A) to a supply terminal (VSS, VDD). The protective circuit also contains devices (zw2, z5) which prevent or provide a bypass for any undesired flow of current (i3, i4) between at least parts of the four-layer device and triggerable circuit regions (W2).

Protective circuit for protecting contacts of monolithic integrated

An arithmetic logic unit (ALU) of a digital processor includes a multiplier to which a first data word A and a second data word B are fed as input data from a data memory. A third data word C, also coming from the data memory, is fed through a barrel shifter, whose shift number is q. The output of the barrel shifter is fed to one input of an adder having its other input connected to the output of the multiplier. The output of the adder provides a fourth data word D, which is written into the data memory. All movements of data necessary to form the fourth data word D are defined of a single program instruction.

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March, Germany

Wilfried W Gehrig