Vlsi Technology, Inc.

Koninklijke Philips Corporation N.V.

Wesley R Erck

Michael R Magee

Michael D Beer

Subhas Bothra

Edward D Nowak

David C Chapman

David Eatock

There is a method and system for efficiently computing the number of die per wafer and the corresponding number of stepper shots. In an example embodiment, dimensions for a die and the size of the wafer are received. The dimensions comprise a die element size that is a function of a scribe lane width, a guard ring width, an input/output pad area, and a length and a width of the die. A die count lookup table is selected for the specified wafer size and used to determine the die count corresponding to the die element size. In a similar manner, a stepper shot count lookup table is selected for the specified wafer size and used to determine the stepper shot count corresponding to the die element size.

Computation of die-per-wafer considering production technology and wafer size

A method and system thereof for maximizing integrated circuit die production. In an example embodiment, the method is implemented on a server computer system in a client-server computer system network. In this embodiment, the server computer system receives from a client computer system a wafer size, a scribe lane width, and the dimensions for a die. A die count and a stepper shot count corresponding to the dimensions are determined using one or more lookup tables. A lookup table is associated with each combination of wafer size and scribe lane width. A measure of die production is calculated using the die count and the stepper shot count and transmitted to the client computer system. The dimensions can be changed and a new measure of die production calculated using the changed dimensions, until a maximum value of the measure of die production is determined.

Method and system for varying die shape to increase wafer productivity

A method and system thereof for efficiently computing the number of dies per wafer and the corresponding number of stepper shot counts. Dimensions for a die and the size of the wafer are received. The dimensions comprise a die element size that is a function of a scribe lane width, a guard ring width, an input/output pad area, and a length and a width of the die. A die count lookup table is selected for the specified wafer size and used to determine the die count corresponding to the die element size. In a similar manner, a stepper shot count lookup table is selected for the specified wafer size and used to determine the stepper shot count corresponding to the die element size. The axes of the die count and stepper shot count lookup tables are incremented by varying amounts; for example, the increments in one portion of the lookup tables are smaller (finer), and in another portion the increments are larger (grosser). By using larger increments in portions of the lookup tables, the amount of data in the tables can be reduced, making the tables easier to generate and work with.

Efficient database for die-per-wafer computations

The planarity of the dielectric layer over a processing layer is increased by adjustments made to a mask generated for patterning the processing layer. Active circuitry lines are generated for the mask. Also, a fill pattern is generated for the mask. The fill pattern is placed in areas of the mask not filled by the active circuitry lines. The active circuitry lines are combined with the fill pattern to produce a final pattern for the mask. In one embodiment, the fill pattern is generated by first over-sizing the active circuitry lines to form a first pattern. The first pattern is inverted to produce a negative of the first pattern. The negative of the first pattern serves as a marker layer. In addition, a dummy fill pattern is generated. An intersection of the marker layer and the dummy fill pattern is performed to produce an unsized fill pattern. Areas which have widths smaller than a predetermined minimum width and areas which have heights smaller than a predetermined minimum height are eliminated from the unsized fill pattern to produce the final fill pattern. The union of the original active circuitry lines and the final fill pattern forms a composite pattern for the photomask.

Patterned filled photo mask generation for integrated circuit

An apparatus and a method for making a reticle mask is disclosed. A reticle mask is made by the double pass method wherein scribe lines are first drawn on the reticle mask. Thereafter, a product die pattern is made in the reticle mask by a plurality of times. A plurality of alignment marks are associated with each product die pattern. The plurality of alignment marks are all written in the scribe line region. Thus, any deviation of the relative position of the product die pattern to the scribe line may be quantified.

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Danville, CA, United States of America

Wesley R Erck