Ansys, Inc.

Werner Thiel

J Eric Bracken

Xin Xu

Guangran Zhu

Systems and methods are provided for generating an equivalent circuit model. RLGC parameters representing a segment of a layered structure of a specified length are received. The layered structure includes two conductors (also called planes) and at least one trace or a transmission line located between the two conductors. An admittance matrix corresponding to the segment is computed based at least in part on the received RLGC parameters. One or more loading parameters representing a loading of one of the two conductors due to the trace or traces are also computed, and a segment circuit model for the segment of the layered structure based at least in part on the admittance matrix and the one or more loading parameters.

Systems and methods for full-order equivalent circuit approach (ECA) modeling of layered structures

Systems and methods are provided for analyzing a via. A physical representation of a via intersecting with an upper layer and a lower layer is received, the physical representation comprising: (i) a pair of pad dimensions comprising an upper pad dimension aand a lower pad dimension a, and/or (ii) a pair of anti-pad dimensions comprising an upper anti-pad dimension band a lower anti-pad dimension b, where at least one of first and second conditions: (A) the first condition being ais different than a, and (B) the second condition being bis different than b, is true. A determination is made as to which, if any, of the conditions are true. At least one model parameter is selected based on the determination. An admittance parameter corresponding to a section of the via located between the upper and lower layers is computed using the selected model parameter.

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Pittsburgh, PA, United States of America

Werner Thiel