Infineon Technologies Ag

Qimonda Ag

United Test and Assembly Center Limited

Werner Josef Reiss

Ralf Otremba

Alexander Heinrich

Edmund Riedl

Wu Hu Li

Saverio Trotta

Ashutosh Baheti

Wolfgang Hetzel

Chau Fatt Chiang

Kian Teng Eng

Kok Yau Chua

Stefan Helmut Schmalzl

Pang Hup Ong

Chee Hong Lee

Soon Lee Liew

Hock Heng Chong

Nurfarena Othman

Hsieh Ting Kuek

Pei Luan Pok

Rodel Manalac

Soo Pin Chow

Roslie Saini Bin Bakar

Denver Paul C Castillo

Bryan Soon Hua Tan

April Coleen Tuazon Bernardez

Junny Abdul Wahid

Florian Ammer

Kon Hoe Chin

A method of making a semiconductor including soldering a conductor to an aluminum metallization is disclosed. In one example, the method includes substituting an aluminum oxide layer on the aluminum metallization by a substitute metal oxide layer or a substitute metal alloy oxide layer. Then, substitute metal oxides in the substitute metal oxide layer or the substitute metal alloy oxide layer are at least partly reduced. The conductor is soldered to the aluminum metallization using a solder material.

Soldering a conductor to an aluminum metallization

Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.

Semiconductor package with air cavity

A semiconductor device package includes a radio frequency front end circuit configured to process radio frequency signals, a first antenna, an antenna substrate, and a first conductive barrier. The first antenna is configured to transmit/receive a first radio frequency signal. The antenna substrate includes the first antenna. The antenna substrate is configured to transfer the first radio frequency signal between the radio frequency front end circuit and the first antenna. The first conductive barrier is configured to electromagnetically and electrostatically isolate the first antenna.

Radio frequency device packages and methods of formation thereof

A semiconductor device package includes an integrated circuit chip comprising a radio frequency device. The radio frequency device includes active circuitry at a first surface of the integrate circuit chip. An antenna substrate is disposed over the first surface of the integrated circuit. The antenna substrate includes a first conductive layer disposed over the first surface of the integrated circuit chip. The first conductive layer includes a first transmission line electrically coupled to the integrated circuit chip. A first laminate layer is disposed over the first conductive layer. The first laminate layer overlaps a first part of the first transmission line. A second conductive layer is disposed over the first laminate layer. The second conductive layer includes a first opening overlapping a second part of the first transmission line. A second laminate layer is disposed over the second conductive layer. A first antenna is disposed over the second laminate layer and overlaps the first opening, the second part of the first transmission line, and the integrated circuit chip.

A method of mounting a semiconductor die on a substrate with a solder mask on a first surface includes placing a die on the solder mask, and mounting the die to the substrate by applying pressure and heat. The applied pressure ranges from a bond force of approximately 5 to 10 kgf, the heat has a temperature range from approximately 150 to 200&#xb0; C. and the pressure is applied for a range of approximately 1 to 10 seconds.

Semiconductor package and method of attaching semiconductor dies to substrates

A stackable packaged chip includes a substrate with a conductive wiring formed therein or thereon. The substrate further includes a plurality of substrate contact pads arranged around a periphery portion of the substrate. A chip mounted on the substrate including contact pads that are electrically connected with the conductive wiring of the substrate, and a ring surrounding edges of the chip are also included. The ring is formed from an electrically insulating material and includes a plurality of openings, each opening adjacent a substrate contact pad to allow for electrical connection to the chip though the substrate contact pad.

Stackable single package and stacked multi-chip assembly

Growing community of inventors

Bad Feilnbach, Germany

Werner Josef Reiss