Japan Display West Inc.

Sony Corporation

Werapong Jarupoonphol

Yoshitoshi Kida

Takeya Takeuchi

Tomohiko Sato

Yoshiharu Nakajima

Yuko Yamauchi

The present invention provides a liquid crystal display device including: a pixel array including a plurality of scanning lines arranged in rows, a plurality of signal lines arranged in columns, a plurality of liquid crystal elements arranged in a matrix corresponding to an intersection of each scanning line and each signal line, and a plurality of common connection lines arranged one by one corresponding to the liquid crystal elements of each line; a scanning line drive circuit; a signal line drive circuit; and a common connection line drive circuit electrically separating, from each other, one or a plurality of common connection lines (first common connection lines), and a plurality of common connection lines (second common connection lines), and electrically connecting the plurality of second common connection lines to each other to independently drive the first common connection line and the second connection lines from each other.

Liquid crystal display device, and method of driving liquid crystal display device

A semiconductor circuit which outputs an active potential in a first period and which holds an inactive potential in a second period which is longer than the first period and then outputs the inactive potential, the semiconductor circuit includes a switch element which is connected between a potential supply section which supplies the inactive potential and a circuit output terminal, and which is brought into a conduction state in the second period so as to output the inactive potential to the circuit output terminal.

Semiconductor circuit, shift register circuit, display device, and electronic apparatus

A liquid crystal display device is provided, which may reduce flicker in all display gray levels. The liquid crystal display device includes a scan line drive circuit, a signal line drive circuit and a common connection line drive circuit. The common connection line drive circuit applies a voltage, the voltage having polarity opposite to polarity of the signal line, to a common connection line corresponding to a liquid crystal element as a selection object in a write period for writing into the liquid crystal element as a selection object, and applies one or multiple voltages, each voltage having a value different from a center value between an upper limit value and a lower limit value of voltages applied to the common connection lines in the write period, to the common connection lines in a holding period after writing into the liquid crystal element as a selection object is performed.

Liquid crystal display device with common connection line voltage adjusted in a holding period for an improved performance

Disclosed herein is a delay circuit for performing one of a charge and a discharge in two stages, and delaying a signal, the delay circuit including an output section configured to output a delayed signal; two power supplies; and a delay inverter; wherein the delay inverter has a first transistor and a second transistor of an identical channel type for one of a first charge and a first discharge, the first transistor and the second transistor being connected in series with each other between the output section and one power supply, and the delay inverter has a third transistor of a different channel type from the first transistor and the second transistor for one of a second charge and a second discharge, the third transistor being connected in parallel with one of the first transistor and the second transistor.

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Kanagawa, Japan

Werapong Jarupoonphol