Advanced Micro Devices Corporation

Weon Taek Na

Yasuko Eckert

Gabriel H Loh

Sergey Blagodurov

Jagadish B Kotra

William Louie Walker

Steven E Raasch

Michael Warren Boyer

Mark Henry Oskin

A processing system selectively allocates space to store a group of one or more cache lines at a cache level of a cache hierarchy having a plurality of cache levels based on memory access patterns of a software application executing at the processing system. The processing system generates bit vectors indicating which cache levels are to allocate space to store groups of one or more cache lines based on the memory access patterns, which are derived from data granularity and movement information. Based on the bit vectors, the processing system provides hints to the cache hierarchy indicating the lowest cache level that can exploit the reuse potential for a particular data.

Adaptive cache management based on programming model information

An approach for tracking data stored in caches uses a Bloom filter to reduce the number of addresses that need to be tracked by a coherence directory. When a requested address is determined to not be currently tracked by either the coherence directory or the Bloom filter, tracking of the address is initiated in the Bloom filter, but not in the coherence directory. Initiating tracking of the address in the Bloom filter includes setting hash bits in the Bloom filter so that subsequent requests for the address will 'hit' the Bloom filter. When a requested address is determined to be tracked by the coherence directory, the Bloom filter is not used to track the address.

Using a bloom filter to reduce the number of memory addressees tracked by a coherence directory

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Bellevue, WA, United States of America

Weon Taek Na