Samsung Electronics Co., Ltd.

Weon-cheol Hong

Young-Hoon Park

Yun-Seung Shin

Eun-young Min

The present invention is directed to a semiconductor structure, and a fabrication technique for forming such a structure, configured to confine and prevent expansion of cracking of the insulating layer below a bonding pad, that are generated as a result of the bonding process. In a first embodiment, the present invention includes a vertical frame, formed, for example of conductive material, surrounding the outer perimeter of the bonding pad, and extending through an underlying insulating layer. A horizontal frame lies below the vertical frame. Together, the vertical frame and horizontal frame confine cracks emanating below the bonding pad to within the frame region. In a second embodiment, horizontal and vertical portions of the frame are formed by a conductive layer provided in an opening formed in the insulating layer. Since the isolation frame prevents cracks from expanding into surrounding regions of the integrated circuit, overall process yield and reliability are improved.

Bonding pad structures for semiconductor devices and fabrication methods thereof

A method for forming a capacitor for an integrated circuit device includes the following steps. An interlayer dielectric layer is formed on a substrate, and a contact hole is formed in the interlayer dielectric layer. A first conductive layer is then formed on the interlayer dielectric layer, wherein the first conductive layer is electrically connected to the substrate through the contact hole. A hole having a depth less than the thickness of the first conductive layer is etched in the first conductive layer. An insulating layer is formed in the hole and the first conductive layer is then etched to a predetermined depth using the insulating layer as an etching mask to expose a side wall of an upper portion of the insulating layer. A spacer is formed on the side wall of the upper portion of the insulating layer. The first conductive layer is then etched using the insulating layer and the spacer as etching marks to form an electrode structure. The insulating layer and spacer are then removed. Lastly, the capacitor is completed by forming a dielectric layer on the electrode structure and then forming a second conductive layer on the dielectric layer.

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Suwon, South Korea

Weon-cheol Hong