Shanghai Huali Integrated Circuit Corporation

Wenyin Weng

The present application provides a method for improving the metal work function boundary effect in FinFET process, the method comprises steps of: depositing a first TiN layer on four fin structures. The first TiN layer has no gap between the second and the third fin structures; removing the first TiN layer up to a first distance from the midline between the second and third fin structures at the second fin structure side; depositing a second TiN layer; removing the second and first TiN layers from second fin structure. The thickness of the TiN layer at the bottom edge of the fin structure at the later structure of the ultra-low threshold voltage P-type transistor will be smaller from this process. Thus formed TiN layer is less prone to a bottom undercut during etching, thereby reducing the metal boundary effect and increasing of the threshold voltage of the device.

Method for improving metal work function boundary effect

A method for manufacturing a fin field-effect transistor is provided, comprising making metal gates, a gate dielectric layer, and a work function layer of the metal gate structures, followed by removing a portion of the end of each of the metal gates that protrudes from a fin region. Since the work function layer is already formed by the removing step, the process window of the work function layer is not affected. Therefore, a relatively large edge region of the metal gates can be removed, thereby minimizing the parasitic capacitance Cgs between the gate and the source or parasitic capacitance Cgd between the gate and the drain of a fin field-effect transistor device in operation. Meanwhile this step simplifies and compatible with the finFET process.

Method for manufacturing fin field-effect transistor and fin field-effect transistor structure

A field effect transistor structure includes a connection hole leading out a gate structure arranged on the formation area of one of a plurality of fins, and connection holes leading out a source electrode and a drain electrode, wherein the connection hole leading out the gate structure is located on formation areas of different fins; a gate cap layer formed at the top of the gate structure formed on the same fin body and adjacent to the connection holes leading out the source electrode and the drain electrode, wherein the gate cap layer protects the corresponding gate structure; buried holes formed on the source electrode and the drain electrode at both sides of the connection hole leading out the gate structure; a buried hole cap layer formed on the buried holes, and the buried hole cap layer protects the buried holes connecting the source and the drain electrode.

Field effect transistor, method for making the same and layout in process of forming the same

A method for making field effect transistors includes forming a connection leading out a gate structure arranged on one of a plurality of fins, and connections for source and drain and the gate structure are located on formation areas of different fins; forming a gate cap layer at the top of the gate structure to protect it on the same fin body and adjacent to the connections for source and drain; forming buried holes on the source and drain at both sides of the gate structure connection; forming a buried hole cap layer on the buried holes, to protect the buried holes which connect the source and the drain electrodes.

Method for making field effect transistor and field effect transistor formed

A semiconductor FinFET device includes a first work function layer configured to form a first threshold voltage and a second work function layer is configured to form a second threshold voltage. As the device is on, the channel region is divided laterally into a first portion and a second portion, wherein the first portion is located under the first work function layer, and wherein the second portion is located under the second work function layer. The first and second work function layers are configured such that the second threshold voltage is greater than the first threshold voltage to provide a higher withstanding voltage. The first work function layer comprises TiN, and the second work function layer comprises TiN and TiAl; or the first work function layer contains TiAl, and the second work function layer comprises TiN and TiAl.

Semiconductor device

A method for manufacturing a transistor device includes a field oxide layer isolates an active region of a core device region from an active region of an input/output device region on a semiconductor substrate, the active region of the core device region is exposed by means of a mask layer, a gate-all-around structure is formed in the active region of the core device region, and a fin gate structure is formed in the active region of the input/output device region, thereby the on-current and off-current performance of the input/output device is not affected when the short channel effect of the core device is improved.

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Shanghai, China

Wenyin Weng