Tencent Technology (shenzhen) Company Limited

Chinese Academy of Sciences

Guangzhou Automobile Group Co., Ltd.

Vtt-ntm Ou

Tencent Technology Company Limited

Wenlong Zhang

Shengyu Zhang

Yarui Zheng

Sainan Huai

Chuhong Yang

Yu Zhou

Maochun Dai

Bin Wang

Jie Yu

Zhenxing Zhang

Yicong Zheng

Lei Zeng

Feng Jiao

Nikolay Voznesenskiy

Dengfeng Li

Guangwei Ran

Mariia Voznesenskaia

Tatiana Voznesenskaia

Zhongping Zhao

Xiaohui Chen

Shaotang Huang

Zhide Zhang

Dongmei Ma

Chunshui Jin

Haitao Zhang

Sunan Ding

Yongdan Huang

Kanglin Xiong

Jiagui Feng

Xiao Chen

Kunliang Bu

Biao Wu

This disclosure includes a method for fabricating an air bridge, an air bridge structure, and a superconducting quantum chip, and relates to the field of circuit structures. In some examples, a method for fabricating an air bridge includes forming an air bridge brace structure on a substrate, and forming, on the air bridge brace structure and the substrate, an air bridge material layer with one or more openings in the air bridge material layer that reveal the air bridge brace structure. The air bridge material layer with the one or more openings is formed based on a patterned photoresist layer with patterns corresponding to the one or more openings. The method further includes removing, based on the one or more openings in the air bridge material layer, the air bridge brace structure to obtain the air bridge having the one or more openings.

Method for fabricating air bridge, air bridge structure, and superconducting quantum chip

This application relates to a photoresist removal method, including: acquiring a target wafer, a photoresist being provided on a surface of the target wafer, a surface of a photoresist layer of the photoresist being plated with a metal overhead layer; immersing the target wafer in a first organic solvent at a first temperature in a water bath for a first duration; rinsing the target wafer with a new first organic solvent in response to an end of the first duration; performing, in the first organic solvent, ultrasonic cleaning on the rinsed target wafer for a second duration based on a target ultrasonic power; removing the residual first organic solvent on the surface of the target wafer in response to an end of the second duration; and drying the target wafer with the solvent removed by simultaneous centrifugal drying and gas purging to obtain the target wafer with the photoresist removed.

Photoresist removal method and photoresist removal system

This application discloses methods and devices for a quantum chip, a quantum processor and a quantum computer, and relates to the field of quantum technology. The quantum chip includes a bottom sheet and a top sheet; a qubit array disposed on the top sheet, the qubit array comprising a plurality of qubits distributed in an array structure of M rows by N columns, and M and N being both integers greater than 1; a reading cavity disposed on the bottom sheet, and the reading cavity being configured to acquire status information of a qubit in the qubit array; and the bottom sheet and the top sheet being electrically connected.

Quantum chip, quantum processor and quantum computer

Embodiments of this disclosure provide a photoresist structure, a patterned deposition layer, a semiconductor chip and a manufacturing method thereof According to the method for manufacturing a photoresist structure, a single photoresist is used, a second photoresist layer having an undercut can be obtained by only one development process using a single developing solution, and the size of the undercut can be controlled by the development time, thereby solving the problems such as difficulty in lift-off caused by adhesion of the deposited material to the sidewall of the photoresist structure in traditional lift-off processes.

Photoresist structure, patterned deposition layer, semiconductor chip and manufacturing method thereof

A method for manufacturing an air bridge, an air bridge, and an electronic device are disclosed. The method for manufacturing an air bridge includes: applying a first photoresist layer to a substrate; applying a second photoresist layer to the first photoresist layer; exposing, developing, and fixing the second photoresist layer, to form a patterned structure; etching away the first photoresist layer in a specified area through the patterned structure, to form a structure for blocking a deposition material from diffusing to a periphery on the substrate, the specified area including a projection area formed on the first photoresist layer by a top opening of the patterned structure; and depositing a bridge support structure on a surface of the substrate exposed after the first photoresist layer in the specified area is etched away, and forming an air bridge based on the bridge support structure.

Manufacturing method of air bridge, air bridge and electronic device

This disclosure discloses a method for preparing an indium pillar, a chip substrate and a chip. The method includes: applying a first photoresist layer on a substrate; applying a second photoresist layer on the first photoresist layer; covering a part of a surface of the second photoresist layer; underexposing the part of the second photoresist layer to obtain a processed second photoresist layer; developing and fixing the processed second photoresist layer to form an undercut structure; etching the first photoresist layer through the undercut structure to form an expose area; and depositing an indium material on the exposed area to form an indium pillar solder.

Method for preparing indium pillar solder, chip substrate and chip

A wake-up control method for a Body Control Module (BCM) includes: step S1 writing IDs and wake-up level information of all Micro Controller Unit (MCU) pins serving as an external wake-up source to a retention RAM; step S2, setting a wake-up detection timer, and triggering a system to enter a low power consumption mode; step S3, after a wake-up detection time set by the wake-up detection timer expires, enabling power supply to all MCU pins, setting the corresponding MCU pin as an input pin according to the pin ID information written in step S1, and acquiring level information of the input pin; and step S4, comparing the level information of the input pin with the wake-up level information written in step S1, if they are consistent, writing the ID of the input pin that is to serve as a wake-up source to the retention RAM and triggering the system to enter a normal operating mode, and if they are inconsistent, disabling the power supply to the MCU pin. A wake-up control device for a BCM is further provided. The wake-up control method and the wake-up control device for a BCM reduce selection requirements for MCU chips, and provide more flexible hardware pin allocation and design for a wake-up source.

Wake-up control method and device for body control module

Methods, devices, and servers for friend recommendation are provided. A user association set of a target user is obtained. Original data of each associated user in the user association set is obtained. The original data include location relationship data, associated friend data, time relationship data, or combinations thereof, between each associated user and the target user. The original data of each associated user is screened to obtain feature data to form a feature collection for each associated user. A pre-configured N-Tree prediction model is used to process the feature collection for a prediction calculation to obtain an association-predicting value for each associated user. According to the association-predicting value of each associated user, a friend user for the target user from the user association set is determined and recommended to the target user.

Method, device, and server for friend recommendation

A diffraction interferometer includes a reference light passage, a test light passage and a pinhole substrate. The pinhole substrate includes a test pinhole and a reference pinhole. The diffracted wavefront emitted from the test pinhole is reflected by the optical component to be tested adjacent to the pinhole substrate and a converge adjacent to the reference pinhole. The diffracted wavefront includes surface shape information of an optical component to be tested that is reflected by the pinhole substrate. Interference with the diffracted wavefront is emitted by the reference pinhole and forms interference fringes. The large numerical aperture phase-shifting dual pinhole diffraction interferometer adopts a dual pinhole substrate and a illumination manner with two converged light paths to enable the separation of the reference light and test light, to prevent disturbance between the two light paths, which would induce the change of interferogram status during phase-shifting.

Large numerical aperture phase-shifting dual pinhole diffraction interferometer and its test method

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Shenzhen, China

Wenlong Zhang