Texas Instruments Corporation

Diodes Inc.

Wenliang Chen

Jiansong Chen

Lin Chen

Jonathan S Brodsky

Reza Sharifi

Ryan Erik Lind

Eung Jung Kim

Dening Wang

Wei-Chung Wu

Jairo Daniel Olivares

Aline Claude Sadate

Byron Mitchell Reed

Yuan Gu

Jin-sheng Wang

A switched mode power supply (SMPS) includes a first switch, a second switch connected, at a switching node, in series with the first switch, and an inductor coupled between the switching node and an output node for providing an inductor current, at the output node. The SMPS also includes an oscillator circuit for providing a clock signal characterized by an oscillating frequency, an adaptive minimum duty-cycle circuit configured to receive an error voltage signal and to generate a current signal to vary the oscillating frequency of the clock signal in response to the error voltage signal, wherein the error voltage signal is based on an output signal at the output node, and a pulse-width modulation (PWM) circuit configured to receive the error voltage signal and the clock signal and to provide a switching control signal to control the first switch and the second switch.

Adaptive minimum duty cycle design to extend operational voltage range for DCDC converters

A method for a switched mode power supply (SMPS) includes providing an error voltage signal based on a difference between a sampled output voltage of the SMPS and a target voltage, and generating a clock signal characterized by an oscillating frequency; generating a switching control signal based on the error voltage signal and the clock signal using pulse-width modulation (PWM). The method further includes varying the oscillating frequency of the clock signal according to the error voltage signal in a current generating circuit, and applying the switching control signal to control the power switches of the SMPS.

This disclosure relates to a multiphase converter design with multi-path phase management circuit and output logic. The phase management circuit and output logic can be employed to implement phase adding and shedding operations based on input and output current information and based on control signals for a power stage of the converter. In some examples, the design employs an estimate of an average output current based on a current at an input of the converter for phase control. In additional examples, the design employs cycle-by-cycle current limit and maximum duty-cycle signals to enable phase quickly during load transient. In further examples, the design employs low input and output-current sensed signals for efficient phase shedding and power saving. The design herein improves an overall accuracy of phase adding and shedding, load transient response performance, an operational efficiency and thermal performance of multiphase converter.

Multiphase converter design with multi-path phase management

Embodiments of the invention improve efficiency and address the stability issues that arise when a boost converter is used for both backlight WLEDs and camera flash applications, which require increased voltage or output voltage less than input voltage. In prior solutions, boost converters may suffer poor efficiency when operating in a fixed high output voltage mode or may lose stability by not properly regulating their output when operating in a step-down voltage mode. To improve efficiency of the boost converter, the present invention uses a 100%-pass mode topology when the battery voltage is high enough to support the diode voltage required for the backlight WLEDs or the camera flash. On the other hand, when the battery voltage drops below the required voltage, then the converter switches automatically to boost mode to generate a sufficient output voltage to drive the diodes to the required current level.

Boost converter design with 100%-pass mode for WLED backlight and camera flash applications

Various apparatuses, methods and systems for protecting a driver from electrostatic discharge are disclosed herein. For example, some exemplary embodiments provide a driver, including a buffer, a leakage path blocking transistor connected to an output of the buffer, and an output driver connected to an output of the leakage path blocking transistor. Current from the output driver to the buffer is substantially blocked by the leakage path blocking transistor.

Driver with electrostatic discharge protection

A temperature independent CMOS reference voltage circuit includes a CMOS current mirror circuit containing first and second CMOS transistors of a first polarity. A temperature compensation circuit is coupled to the CMOS current mirror circuit, and contains a first resistor, a second resistor, and third and fourth CMOS transistors of a second polarity. The third and fourth CMOS transistors are configured to operate substantially in a subthreshold region. One of the third and fourth CMOS transistors is diode connected.

Temperature independent CMOS reference voltage circuit for low-voltage applications

A bias generator circuit with improved phase margin without RC compensation includes: a first transistor MP ; a second transistor MP coupled in parallel with the first transistor MP ; an amplifier A having a first input coupled to the first and second transistors MP and MP , and to a gate of the second transistor MP , and a second input coupled to a control voltage node VCTRL; a third transistor MN coupled in series with the first transistor MP ; a fourth transistor MN coupled in series with the third transistor MN and having a gate coupled to an output of the amplifier A ; a fifth transistor MP ; a sixth transistor MP coupled in parallel with the fifth transistor MP ; a seventh transistor MN coupled in series with the fifth transistor MP ; and an eighth transistor MN coupled in series with the seventh transistor MN and having a gate coupled to a gate of the fourth transistor MN . In order to maintain the bias generator stability for different biasing conditions, the feed-forward path is removed by diode connecting the second transistor MP instead of connecting the gate of the second transistor MP to the control voltage node VCTRL.

Growing community of inventors

Plano, TX, United States of America

Wenliang Chen