Applied Materials, Inc.

Wenjing Xu

Feng Chen

Tae Hong Ha

Xianmin Tang

Zhiyuan Wu

Lu Chen

Gang Shen

Kartik Bhupendra Shah

Adolph Miller Allen

Michael Sterling Jackson

Karthik Ramanathan

Satish Radhakrishnan

Yufei Hu

Karthikeyan Balaraman

Xinyuan Chong

Carmen Leal Cervantes

Weize Hu

Mitrabhanu Sahu

Xiangjin Xie

Kevin Kashefi

Cheng-Hsiung Matthew Tsai

Alexander Jansen

Aravind Kamath

Yizhak Sabba

Ge Qu

Yong Jin Kim

Methods of forming devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. A self-assembled monolayer (SAM) is formed on the bottom of the gap, and a barrier layer is formed on the SAM before selectively depositing a metal liner on the barrier layer. The SAM is removed after selectively depositing the metal liner on the barrier layer.

Method of forming a metal liner for interconnect structures

Methods for selective deposition are described herein. Further, methods for improving selectivity comprising an ammonia plasma pre-clean process are also described. In some embodiments, a silyl amine is used to selectively form a surfactant layer on a dielectric surface. A ruthenium film may then be selectively deposited on a conductive surface. In some embodiments, the ammonia plasma removes oxide contaminations from conductive surfaces without adversely affecting the dielectric surface.

Methods of selective deposition

Methods and apparatus for processing a substrate include cleaning and self-assembly monolayer (SAM) formation for subsequent reverse selective atomic layer deposition. An apparatus may include a process chamber with a processing volume and a substrate support including a pedestal, a remote plasma source fluidly coupled to the process chamber and configured to produce radicals or ionized gas mixture with radicals that flow into the processing volume to remove residue or oxides from a surface of the substrate, a first gas delivery system with a first ampoule configured to provide at least one first chemical into the processing volume to produce a SAM on the surface of the substrate, a heating system located in the pedestal and configured to heat a substrate by flowing gas on a backside of the substrate, and a vacuum system fluidly coupled to the process chamber and configured to control heating of the substrate.

Methods and apparatus for precleaning and treating wafer surfaces

Process recipe data associated a process to be performed for a substrate at a process chamber is provided as input to a trained machine learning model. A set of process recipe settings for the process that minimizes scratching on one or more surfaces of the substrate is determined based on one or more outputs of the machine learning model. The process is performed for the substrate at the process chamber in accordance with the determined set of process recipe settings.

Reducing substrate surface scratching using machine learning

Electronic devices and methods of forming electronic devices using a ruthenium or doped ruthenium liner and cap layer are described. A liner with a ruthenium layer and a cobalt layer is formed on a barrier layer. A conductive fill forms a second conductive line in contact with the first conductive line.

Ruthenium liner and cap for back-end-of-line

Ruthenium liner and cap for back-end-of-line applications

Described are microelectronic devices comprising a dielectric layer formed on a substrate, a feature comprising a gap defined in the dielectric layer, a barrier layer on the dielectric layer, a two metal liner film on the barrier layer and a gap fill metal on the two metal liner. Embodiments provide a method of forming a microelectronic device comprising the two metal liner film on the barrier layer.

Binary metal liner layers

Methods and systems for reducing substrate particle scratching using machine learning are provided. A machine learning model is trained to predict process recipe settings for a substrate temperature control process to be performed for a current substrate at a manufacturing system. First training data and second training data are generated for the machine learning model. The first training data includes historical data associated with prior process recipe settings for a prior substrate temperature control process performed for a prior substrate at a prior process chamber. The second training data is associated with a historical scratch profile of one or more surfaces of the prior substrate after performance of the prior substrate temperature control process according to the prior process recipe settings. The first training data and the second training data are provided to train the machine learning model to predict which process recipe settings for the substrate temperature control process to be performed for the current substrate correspond to a target scratch profile for one or more surfaces of the current substrate.

Methods and apparatus for forming an interconnect structure, the method including selectively depositing two or more capping layers atop a top surface of a via within a low-k dielectric layer, wherein the two or more capping layers include a first layer of ruthenium and a second layer of cobalt.

Methods for forming cobalt and ruthenium capping layers for interconnect structures

Growing community of inventors

San Jose, CA, United States of America

Wenjing Xu