United Microelectronics Corp.

United Integrated Circuits Corp.

Other

United Integrated Circuit Corp.

Weng-Yi Chen

Kuen-Chu Chen

Chang-Sheng Hsu

Kuan-Yu Wang

Chia-Wei Lee

Shih-Wei Li

Chih-Fan Hu

Yuan-Sheng Lin

Jung-Hao Chang

Meng-Jia Lin

Te-huang Chiu

Yung-Hsiao Lee

Chung-Hsien Liu

Chih-Wei Liu

Ping-Chung Chung

Tsung-Lin Lu

Hunter Chung

Guo-Chih Wei

Chin-Hsien Chen

Jack Yao

Chienfeng Chen

Juei-kuo Wu

En-Chan Chen

A micro electro mechanical system (MEMS) device and a method for manufacturing the same are provided. The MEMS device includes a substrate, a polymer film on the substrate and having a lower surface facing toward the substrate, a cavity passing through the substrate, and coil structures on the substrate and in the polymer film. The polymer film includes a corrugation pattern on the lower surface of the polymer film. A portion of the polymer film is exposed in the cavity.

MEMS device including coil structure with corrugated polymer film

A micro electromechanical system (MEMS) includes a substrate, a semiconductor device and a protection wall. The substrate has a surface. The semiconductor device is disposed on the surface. The protection wall has a poly-silicon layer surrounding the semiconductor device and connecting to the surface.

Micro-electromechanical system and method for fabricating MEMS having protection wall

A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO-patterned portion, and a second Pt-patterned portion on the second TiO-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiOlayer formed on the IMD layer, a first TiO-patterned portion and a first Pt-patterned portion.

Semiconductor sensor and method of manufacturing the same

A method of fabricating a MEMS structure includes providing a substrate comprising a logic element region and a MEMS region. Next, a logic element is formed within the logic element region. A nitrogen-containing material layer is formed to cover the logic element region and the MEMS region conformally. Then, part of the nitrogen-containing material layer within the MEMS region is removed to form at least one shrinking region. Subsequently, a dielectric layer is formed to cover the logic element region and MEMS region, and the dielectric layer fills in the shrinking region. After that, the dielectric layer is etched to form at least one releasing hole, wherein the shrinking region surrounds the releasing hole. Finally, the substrate is etched to form a chamber.

MEMS structure and method of fabricating the same

A MEMS structure includes a substrate, a dielectric layer, a membrane, a backplate, and a blocking layer. The substrate has a through-hole. The dielectric layer is disposed on the substrate and has a cavity in communication with the through-hole. The membrane has at least one vent hole, is embedded in the dielectric layer and together with the dielectric layer defines a first chamber that communicates with the through-hole. The backplate is disposed on the dielectric layer. One end of the blocking layer is embedded in the dielectric layer, and the other end of the blocking layer extends into the cavity; the blocking layer is spatially isolated from the membrane and at least partially overlaps with the at least one vent hole.

Micro-electro-mechanical system structure and method for fabricating the same

A semiconductor sensor, comprising a gas-sensing device and an integrated circuit electrically connected to the gas-sensing device, is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, wherein the platinum (Pt) layer directly contacts the top surface of the tungsten layer.

A micro-electro-mechanical (MEMS) structure and a method for forming the same are disclosed. The MEMS structure includes a sacrificial layer, a lower dielectric film, an upper dielectric film, a plurality of through holes and a protective film. The sacrificial layer comprises an opening. The lower dielectric film is on the sacrificial layer. The upper dielectric film is on the lower dielectric film. The plurality of through holes passes through the lower dielectric film and the upper dielectric film. The protective film covers side walls of the upper dielectric film and the lower dielectric film and a film interface between the lower dielectric film and the upper dielectric film.

Micro-electro-mechanical system structure and method for forming the same

A manufacturing method for a semiconductor structure is disclosed. The semiconductor structure includes a MEMS region. The MEMS region includes a sensing membrane and a metal ring. The metal ring defines a cavity under the sensing membrane.

Manufacturing method for semiconductor structure

A semiconductor structure and a manufacturing method for the same are disclosed. The semiconductor structure includes a MEMS region. The MEMS region includes a sensing membrane and a metal ring. The metal ring defines a cavity under the sensing membrane.

Semiconductor structure and manufacturing method for the same

A piezoresistive microphone includes a substrate, an insulating layer, and a polysilicon layer. A first pattern is disposed within the polysilicon layer. The first pattern includes numerous first opening. A second pattern is disposed within the polysilicon layer. The second pattern includes numerous second openings. The first pattern surrounds the second pattern. Each first opening and each second opening are staggered. A first resistor is disposed in the polysilicon and between the first pattern and the second pattern. The first resistor is composed of numerous first heavily doped regions and numerous first lightly doped regions. The first heavily doped regions and the first lightly doped regions are disposed in series. The first heavily doped region and the first lightly doped region are disposed alternately. A cavity is disposed in the insulating layer and the substrate.

Piezoresistive microphone and method of fabricating the same

A method for removing extraneous matters from a stainless device is provided. The method includes the steps of (a) providing a container for holding a fluorine-containing neutral solution therein, (b) immersing said stainless device in said fluorine-containing neutral solution to remove said extraneous matters from said stainless device, and (c) heating and swirling said fluorine-containing solution. The fluorine-containing neutral solution is made from neutralizing hydrofluoric acid (HF) with ammonium hydroxide (NH,OH), neutralizing hydrofluoric acid (HF) with ammonium fluoride (NH,F), or dissolving ammonium acid fluoride (NH,F) in a deionized water (DIW).

Method for removing extraneous matter by using fluorine-containing solution

An integrated circuit (IC) fabrication method is provided for fabricating a conductive plug, such as a contact plug or a via plug, with a low junction resistance in an integrated circuit. This method is characterized by the inclusion of a preliminary doping process to form a doped region in the exposed area through the contact opening or via opening. By conventional method, the exposed area would be formed with an undesired oxide layer or laid with undesired reactant remnants after the etching process for forming the contact opening or via opening. When being subjected to a high temperature during the subsequent deposition process, the dopant atoms in the doped region diffuse into these undesired insulative matters, thereby reducing the junction resistance of the resulting contact or via plug.

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Zhubei, Taiwan

Weng-Yi Chen