Yangtze Memory Technologies Co., Ltd.

Wenbin Zhou

Zongliang Huo

Wei Xu

Pan Huang

Ping Yan

Haohao Yang

Wenxiang Xu

Ji Xia

Qingqing Wang

ZongLiang Huo

Zhiguo Zhao

Zhaoyun Tang

Hai Lin Xiong

Lei Zhang

Jing Gao

Feng Lu

Peng Yang

Yong Hui Gao

Zhengliang Xia

Deqin Yu

A method for forming a 3D memory device is disclosed. The method includes forming an alternating dielectric stack on a substrate. Then a plurality of channel structures and dummy channel structures vertically penetrating the alternating dielectric stack are formed, The channel structures are located in a core region, and the dummy channel structures are located in a staircase region. A gate line silt structure is formed vertically penetrating the alternating dielectric stack and laterally extending in a first direction. The gate line silt structure includes a narrow portion that has a reduced width along a second direction different from the first direction.

Three-dimensional memory devices and fabricating methods thereof

Embodiments of a three-dimensional (3D) memory device and fabrication methods are disclosed. In some embodiments, the method for forming the 3D memory device includes forming an alternating dielectric stack on a substrate, and forming channel holes that penetrate the alternating dielectric stack and expose at least a portion of the substrate. The method further includes forming top select gate openings that penetrate vertically an upper portion of the alternating dielectric stack and extend laterally. The method also includes forming slit openings parallel to the top select gate openings, wherein the slit openings penetrate vertically the alternating dielectric stack. The method also includes replacing the alternating dielectric stack with a film stack of alternating conductive and dielectric layers, forming top select gate cuts in the top select gate openings, and forming slit structures in the slit openings.

Three-dimensional memory and fabrication method thereof

Embodiments of three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a structure strengthen plug in an upper portion of the alternating dielectric stack, wherein the structure strengthen plug has a narrow support body and two enlarged connecting portions; forming a gate line silt in the alternating dielectric stack to expose a sidewall of one enlarged connecting portion of the structure strengthen plug; and forming a gate line slit structure in the gate line slit including an enlarged end portion connected to the one enlarged connecting portion of the structure strengthen plug.

Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a stack structure including a memory block including a plurality of memory cells. The 3D memory device also includes a first top select structure and a bottom select structure in the memory block and aligned with each other vertically; and a second top select structure in the memory block is separated from the first top select structure by at least one of the plurality of memory cells. The first top select structure, the bottom select structure, and the second top select structure each includes an insulating material.

Three-dimensional memory device without gate line slits and method for forming the same

Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a memory stack having interleaved a plurality of conductor layers and a plurality of insulating layers, a plurality of channel structures extending in the memory stack, and a source structure extending in the memory stack. The source structure includes a plurality of source contacts each in a respective insulating structure. Two adjacent source contacts are conductively connected to one another by a connection layer, the connection layer includes a pair of first portions being over the two adjacent ones of the plurality of source contacts and a second portion between the pair of first portions. A support structure is between the two adjacent source contacts. The support structure includes a cut structure over interleaved a plurality of conductor portions and a plurality of insulating portions.

Three-dimensional memory device with source structure and methods for forming the same

Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a method for forming a 3D memory device includes forming a bottom select structure extending along a vertical direction through a bottom conductor layer over a substrate and along a horizontal direction to divide the bottom conductor layer into a pair of bottom select conductor layers, forming a plurality of conductor layers and a plurality of insulating layers interleaved on the pair of bottom select conductor layers and the bottom select structure, and forming a plurality of channel structures extending along the vertical direction through the pair of bottom select conductor layers, the plurality of conductor layers, and the plurality of insulating layers and into the substrate. The method may further include forming a first top select structure extending along the vertical direction through a top conductor layer of the plurality of conductor layers and along the horizontal direction to divide the top conductor layer into a pair of top select conductor layers. The first top select structure and the bottom select structure may be aligned along the vertical direction and may divide a plurality of memory cells formed by the plurality of conductor layers and the plurality of channel structures into a pair of memory blocks.

A method for forming a three-dimensional (3D) memory device includes forming a cut structure in a stack structure. The stack structure includes interleaved a plurality of initial sacrificial layers and a plurality of initial insulating layers. The method also includes removing portions of the stack structure adjacent to the cut structure to form a slit structure and an initial support structure. The initial support structure divides the slit structure into a plurality of slit openings. The method further includes forming a plurality of conductor portions in the initial support structure through the plurality of slit openings. The method also includes forming a source contact in each of the plurality of slit openings. The method also includes removing portions of the initial support structure to form a support structure. The support structure includes an adhesion portion extending through the support structure. In addition, the method includes forming an adhesion layer over the source contact in each of the plurality of slit openings. At least two adhesion layers are conductively connected to the adhesion portion extending through the support structure.

Three-dimensional memory device with source contacts connected by an adhesion layer and methods for forming the same

A method for forming a 3D memory device is provided. The method includes forming a dielectric stack including interleaved initial insulating layers and initial sacrificial layers over a substrate, and forming at least one slit structure extending vertically and laterally in the dielectric stack and dividing the dielectric stack into block regions. The at least one slit structure each includes slit openings exposing the substrate and an initial support structure between adjacent slit openings. Each block region may include interleaved insulating layers and sacrificial layers, and the initial support structure may include interleaved insulating portions and sacrificial portions. Each insulating portion and sacrificial portion may be in contact with respective insulating layers and sacrificial layers of a same level from adjacent block regions. The method also includes forming channel structures extending vertically through the dielectric stack, replacing the sacrificial layers and sacrificial portions with conductor layers and conductor portions through the at least one slit structure, and forming a source structure in each slit structure. The source structure may include an insulating spacer in each slit opening and a source contact in a respective insulating spacer.

Three-dimensional memory device with support structures in gate line slits and methods for forming the same

Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a method for forming a 3D memory device includes the following operations. A cut structure is first formed in a stack structure. The stack structure includes interleaved initial sacrificial layers and initial insulating layers. A patterned cap material layer is formed over the stack structure. The patterned cap material layer includes an opening over the cut structure. Portions of the stack structure and the patterned cap material layer adjacent to the opening are removed to form a slit structure and an initial support structure. The initial support structure divides the slit structure into slit openings. Conductor portions are formed through the plurality of slit openings to form a support structure. A source contact is formed in each slit opening. A connection layer is formed over the source contact in each slit opening and over the support structure.

A method for forming a three-dimensional (3D) memory device is disclosed. In some embodiments, the method includes forming an alternating dielectric stack on a substrate, and forming a plurality of channel holes penetrating the alternating dielectric stack vertically to expose at least a portion of the substrate. A first mask can be formed to cover the channel holes in a first area and expose the channel holes in a second area. The method also includes forming a recess in the alternating dielectric stack in the second area, followed by forming a second mask in the recess. The second mask covers the channel holes in the second area and exposes the channel holes in the first area. The memory film at bottom of each channel hole in the first area can therefore be removed, while the memory film in the second area can be protected by the second mask.

Dual deck three-dimensional NAND memory with channel dips and method for forming the same

Embodiments of a semiconductor memory device include a substrate having a first region with peripheral devices, a second region with one or more memory arrays, and a third region between the first and the second regions. The semiconductor memory device also includes a protective structure for peripheral devices. The protective structure for peripheral devices of the semiconductor memory device includes a first dielectric layer and a barrier layer disposed on the first dielectric layer. The protective structure for peripheral devices of the semiconductor memory device further includes a dielectric spacer formed on a sidewall of the barrier layer and a sidewall of the first dielectric layer, wherein the protective structure is disposed over the first region and at least a portion of the third region.

Protective structure and fabrication methods for the peripheral circuits of a three-dimensional memory

Embodiments of three-dimensional (3D) memory devices and fabricating methods thereof are disclosed. The method includes: forming an alternating dielectric stack on a substrate; forming a top selective gate cut and two structure strengthen plugs in an upper portion of the alternating dielectric stack, wherein each structure strengthen plug has a narrow support body and two enlarged connecting portions; forming a plurality of channel structures in the alternating dielectric stack; forming a plurality of gate line silts in the alternating dielectric stack, wherein each gate line slit exposes a sidewall of one enlarged connecting portion of a corresponding structure strengthen plug; transforming the alternating dielectric stack into an alternating conductive/dielectric stack; and forming a gate line slit structure in each gate line slit including an enlarged end portion connected to one enlarged connecting portion of a corresponding structure strengthen plug.

Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, the 3D memory device includes a stack structure. The stack structure includes a plurality of conductor layers and a plurality of insulating layers interleaved over a substrate. The plurality of conductor layers include a pair of top select conductor layers divided by a first top select structure and a pair of bottom select conductor layers divided by a bottom select structure. The first top select structure and the bottom select structure extend along a horizontal direction and are aligned along a vertical direction. A plurality of channel structures extend along a vertical direction and into the substrate and are distributed on both sides of the top select structure and the bottom select structure.

Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a memory stack, a plurality of channel structures, and a source structure. The memory stack is over a substrate and includes interleaved a plurality of conductor layers and a plurality of insulating layers. The source structure includes a plurality of source contacts, and two adjacent ones of the plurality of source contacts are conductively connected to one another by a connection layer. A pair of first portions of the connection layer are over the two adjacent ones of the plurality of source contacts and a second portion of the connection layer being between the two adjacent ones of the plurality of source contacts. Top surfaces of the pair of first portions of the connection are coplanar with a top surface of the second portion.

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Wuhan, China

Wenbin Zhou