National Science Council

National Science Council of Republic of China

National Science Counsel of Republic of China

Wen-Shiung Lour

Wen-Chau Liu

Jung-Hui Tsai

The present provides two low offset voltage AlInAs/GaInAs heterostructure-confinement bipolar transistors which include AlInAs heterostructure-confinement and AlInAs/GaInAs superlattice-confinement bipolar transistors. In the present invention, an n GaInAs emitter layer is inserted at AlGaAs confinement layer/GaInAs base layer to reduce offset voltage and potential spike at an E-B junction.

Low offset voltage AlInAs/GaInAs heterostructure-confinement bipolar

The invention relates to the structure of the camel-gate field-effect transistor with multiple modulation-doped channels. The device structure, from the bottom to the top in succession, includes the substrate, the buffer layer, the multiple modulation-doped channels, the thin and complete depletion layer, and the ohmic contact layer. The transistor is characterized by a camel-gate diode, which is composed of the multiple modulation-doped channels, the thin and complete depletion layer and the ohmic contact layer. The gate structure may achieve the high potential height between the gate electrode and the source electrode as well as the high breakdown voltage performance. Furthermore, the use of multiple modulation-doped channels, made of n-type GaAs materials with different thickness and doped concentration, can exhibit excellent properties of high output current, large and linear transconductances.

Camel-gate field-effect transistor with multiple modulation-doped

The invention presents a structure of heterostructure-emitter and heterostructure-base transistor. The device structure are, from bottom upward in succession, a substrate, a buffer layer, a collector layer, a base layer, a quantum well, an emitter layer, a confinement layer and an ohmic contact layer. Of them, except the quantum well which is made of InGaAs and the confinement layer which is formed by AlGaAs, the rest are all made of GaAs material. Base on the design of the heterostructure of base and emitter, a transistor of such structure, under normal operation mode, possesses high current gain and low offset voltage so as to reduce undesirable power consumption. In addition, under the inverted operation mode, the interesting multiple S-shaped negative-differential-resistance may be obtained due to the avalanche multiplication and two-stage carrier confinement effects. These properties cause the device of the invention to provide good promise for amplification, oscillator, and multiple-valued logic circuits applications.

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Chi-Lung, Taiwan

Wen-Shiung Lour