Silicon Motion, Inc.

Zhuhai Shichang Metals Ltd.

Maxchief Investments Limited

Wen-Sheng Lin

Yu-Da Chen

Sung-Yen Hsieh

Hsin-Hung Tsai

A control method of a memory device includes: updating a wear leveling related data temporarily stored in a buffer memory; obtaining multiple parameters; determining a write frequency according to the multiple parameters; and copying the wear leveling related data from the buffer memory to a flash memory module included in the memory device according to the write frequency.

Control method of memory device, and associated flash memory controller and memory device

A control method of a memory device includes: controlling a flash memory controller to transmit a command to a flash memory module; determining whether the flash memory controller is in an idle state; in response to the flash memory controller being in the idle state, determining whether an idle time of the idle state exceeds a threshold value, wherein the threshold value is less than a time required for the flash memory module to complete executing a write command or an erase command; and in response to the idle time exceeding the threshold value, controlling the flash memory controller to enter a power saving mode to turn off a part of components in the flash memory controller.

Flash memory controller that can quickly enter power saving mode after entering idle state, associated flash memory device, and associated control method

The invention relates to a method, and an apparatus for accessing to data in response to a power-supply event. The method, performed by a flash controller, includes steps for: reading a plurality of physical pages of data in a current block from a flash module during a sudden power off recovery procedure; determining whether a power-supply event has occurred according to an error correction result corresponding to read physical pages; reconstructing a first flash-to-host mapping (F2H) table to include physical-to-logical mapping (P2L) information from the 0page to a page before a last valid page in the current block when the power-supply event has occurred; and programming the reconstructed first F2H table into a location of the flash module.

Method and apparatus for accessing to data in response to power-supply event

The invention introduces a non-transitory computer program product for handling a sudden power off recovery (SPOR) to include program code to: drive a flash access interface to read pages of a current block in sequence after a power restart subsequent to a sudden power off (SPO); mark the last correct page of the current block according to page read statuses for the current block; configure n1 pages after the next page of the last correct page of the current block as dummy pages; and drive the flash access interface to store data of the last correct page and its previous n2-1 pages of the current block in empty pages after the last dummy page of the current block, wherein any of n1 and n2 is a positive integer.

Method and computer program product and apparatus for handling sudden power off recovery

The invention relates to a method, and an apparatus for accessing to data in response to a power-supply event. The method, performed by a flash controller, includes steps for: repeatedly detecting whether a voltage supplied to the flash controller is lower than a first threshold; and issuing a program command to a flash module for programming data into the flash module and performing a supervision procedure when the voltage is lower than the first threshold. The supervision procedure includes steps for: repeatedly detecting whether the voltage is lower than a second threshold during a time period when issuing the program command to the flash module until transmitting the data to the flash module completely; and cancelling the program command when the voltage is lower than the second threshold.

A flash memory controller includes a read-only memory, a microprocessor and a buffer memory, wherein the buffer memory includes a data temporary storage area having continuous addresses. When the flash memory controller receives data from a host device, the microprocessor determines whether there is enough space between the last stored data in the data temporary storage area and an end address of the data temporary storage area to store the entire content of the data. If there is not enough space between the last stored data in the data temporary storage area and the end address to store the entire content of the data, the microprocessor directly stores the data from a starting address in the data temporary storage area, without writing any part of the data to the area before the end address of the data temporary storage area.

Electronic device, flash memory controller and associated control method

A flash memory controller is configured to access a flash memory module, and the flash memory controller includes a read-only memory and a microprocessor. When the flash memory controller is powered on and performs an initialization operation, within a predetermined time range of the initialization operation, the microprocessor determines whether a number of spare blocks in the flash memory module is lower than a first threshold value to determine whether to perform a garbage collection operation. When an elapsed time since the flash memory controller is powered on exceeds the predetermined time range, the microprocessor determines whether a number of spare blocks in the flash memory module is lower than a second threshold to determine whether to perform another garbage collection operation, where the second threshold value is lower than the first threshold.

Electronic device, flash memory controller and method for performing garbage collection operation on flash memory module

A data storage device includes a memory device and a memory controller. The memory controller is configured to configure a first predetermined memory block which is an SLC memory block and a second predetermined memory block which is a MLC memory block as buffers to receive data. The memory controller determines to use which scheme to receive data in a predetermined period dynamically according to an amount of valid data stored in the memory device. When the memory controller determines to use a first scheme, the memory controller uses the first predetermined memory block to receive data. When the memory controller determines to use a second scheme, the memory controller uses the first predetermined memory block and the second predetermined memory block to receive data. When the memory controller determines to use a third scheme, the memory controller uses the second predetermined memory block to receive data.

Data storage devices and data processing methods with dynamic programming scheme

The present invention provides a flash memory controller, wherein the flash memory controller includes a read-only memory, a microprocessor and a decoder, wherein the read-only memory is configured to store a program code, and the microprocessor is configured to execute the program code to access a flash memory module. In the operations of the flash memory controller, when the flash memory controller is powered on, the microcontroller reads a plurality of pages of a specific block of the flash memory module, and the decoder decodes data of the plurality of pages. When any one of the pages cannot be decoded successfully, the microcontroller seals the specific block, and increase a priority of the specific block for quality detection or garbage collection.

Flash memory controller, method and associated electronic device for managing priority of quality detection or garbage collection of block

A flash memory controller is disclosed. The flash memory controller is configured to access a flash memory module, wherein the flash memory module includes a plurality of first blocks and a plurality of second blocks, and the flash memory controller includes a microprocessor and a read-only memory storing a program code. When the flash memory controller is powered on, when the flash memory controller is required to write data into the flash memory module, the microprocessor writes the data into the plurality of first blocks only; and the microprocessor writes subsequent data into the second blocks only when a quantity of the plurality of first blocks written by the flash memory controller after power on is greater than a threshold value.

Flash memory controller, method for managing flash memory module and associated electronic device

The invention introduces a non-transitory computer program product for handling a sudden power off recovery (SPOR) to include program code to: drive a flash access interface to read pages of a current block in sequence after a power restart subsequent to a sudden power off (SPO); mark the last correct page of the current block according to page read statuses for the current block; drive the flash access interface to read protection information of pages of a temporary block in sequence, so as to mark the first incorrect page of the temporary block; and drop data of the first incorrect page and pages thereafter of the temporary block.

The present invention provides a flash memory controller, wherein the flash memory controller includes a read-only memory, a microprocessor and a decoder, wherein the read-only memory is configured to store a program code, the microprocessor is configured to execute the program code to access a flash memory module, and the decoder includes a hard decoding function and a soft decoding function. In the operations of the flash memory controller, when the flash memory controller and the flash memory module are powered-on, the flash memory controller reads data from a specific block of the flash memory module, and the decoder determines if disabling the soft decoding function or not according to a status of the specific block or a status of the data.

A data storage device includes a memory controller and a memory device. The memory device includes a current memory block. The memory controller is coupled to the memory device and configured to access the memory device. In response to detection of a sudden power-off that has occurred before the memory device is powered up, the memory controller is configured to find a last valid page and a last valid word line corresponding to the last valid page by scanning a plurality of pages in the current memory block, and determine whether to use one or more empty pages belonging to a word line group that is the same as that of the last valid page according to a read count and an erase count of the current memory block.

Data storage devices and data processing methods

A power recovery technique for a data storage device having a non-volatile memory and a control unit is shown. The non-volatile memory is programmed using one-shot programming, wherein N pages are programmed in one round of one-shot programming and N is a number greater than one. A control unit corrects the final page indicator of an active block of the non-volatile memory in a power recovery procedure to cope with a sudden power-off event, to point the final page indicator to a final page among N pages of one round of one-shot programming.

Data storage device with reliable one-shot programming and method for operating non-volatile memory

A power recovery technique for a data storage device having a non-volatile memory and a control unit is provided. When the data storage device regains power, the control unit writes dummy data to the nonvolatile memory, starting from the next page of a final page indicated by a final page indicator until the first word line group is finished. The first word line group contains an empty page indicated by an empty page indicator. In this manner, user data is protected from being written to an unreliable area.

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Kaohsiung, Taiwan

Wen-Sheng Lin