Taiwan Semiconductor Manufacturing Comp. Ltd.

Wen-Huei Guo

Chih-Hao Chang

Tung Ying Lee

Shou-Zen Chang

Clement Hsingjen Wann

Kong-Beng Thei

Harry Chuang

Yi-Shien Mor

Mong-Song Liang

Ling-Yen Yeh

Chi-Yuan Shih

Sheng-Chen Chung

Jui-Chien Huang

I-Ming Chang

Jung-Hui Kao

Cheng-Long Chen

Yuan-Fu Shao

Ryan Chia-Jen Chen

Kuo-Hua Pan

Cheng-Han Wu

Ta-Chun Lin

Jyh-Huei Chen

Yung-Chih Wang

Chung Long Cheng

Mong Song Liang

Chung-Long Cheng

Kuei-Ming Chang

Rei-Jay Hsieh

Yu-Wei Lee

Buo-Chin Hsu

Kuo-Chiang TIng

Semiconductor devices and manufacturing and design methods thereof are disclosed. In one embodiment, a semiconductor device includes an active FinFET disposed over a workpiece comprising a first semiconductive material, the active FinFET comprising a first fin. An electrically inactive FinFET structure is disposed over the workpiece proximate the active FinFET, the electrically inactive FinFET comprising a second fin. A second semiconductive material is disposed between the first fin and the second fin.

Semiconductor devices having fin field effect transistor (FinFET) structures and manufacturing and design methods thereof

A semiconductor device includes a first fin field effect transistor (FinFET) and a contact bar (source/drain (S/D) contact layer). The first FinFET includes a first fin structure extending in a first direction, a first gate structure extending in a second direction crossing the first direction, and a first S/D structure. The contact bar is disposed over the first S/D structure and extends in the second direction crossing the first S/D structure in plan view. The contact bar includes a first portion disposed over the first S/D structure and a second portion. The second portion overlaps no fin structure and no S/D structure. A width of the second portion in the first direction is smaller than a width of the first portion in the first direction in plan view.

Semiconductor device and a method for fabricating the same

A semiconductor device includes a substrate, first and second source/drain features, and a dielectric plug. The substrate has a semiconductor fin. The first and second source/drain features are over first and second portions of the semiconductor fin, respectively. The dielectric plug is at least partially embedded in a third portion of the semiconductor fin. The third portion is in between the first and second portions of the semiconductor fin. The dielectric plug includes a first dielectric material and a second dielectric material different from the first dielectric material.

Semiconductor device and manufacturing method thereof

Semiconductor devices having Fin Field Effect Transistor (FinFET) structures and manufacturing and design methods thereof

Method for fabricating semiconductor device including contact bars having narrower portions

Semiconductor device having a contact bar over an S/D structure

Semiconductor devices having Fin field effect transistor (FinFET) structures and manufacturing and design methods thereof

An apparatus for and a method of forming a semiconductor structure is provided. The apparatus includes a substrate holder that maintains a substrate such that the processing surface is curved, such as a convex or a concave shape. The substrate is held in place using point contacts, a plurality of continuous contacts extending partially around the substrate, and/or a continuous ring extending completely around the substrate. The processing may include, for example, forming source/drain regions, channel regions, silicides, stress memorization layers, or the like.

Curved wafer processing method and apparatus

An apparatus includes a semiconductor substrate having a plurality of fins, wherein the plurality of fins includes a first group of fins and a second group of fins. The apparatus further includes a high fin density area on the semiconductor substrate including a first dielectric between the first group of fins in the high fin density area, said first dielectric having a first dopant concentration. The apparatus further includes a low fin density area on the semiconductor substrate including a second dielectric between the second group of fins in the low fin density area, said second dielectric having a second dopant concentration. The first dielectric and the second dielectric are a same material as deposited and the first dopant concentration and the second dopant concentration are different.

Fin field-effect transistors having controlled fin height

An embodiment is a method including forming a first fin on a substrate, the first fin having a first longitudinal axis, forming a first trench having a first width in the first fin, the first trench dividing the first fin into at least two fin portions, forming a first gate structure and first source/drain regions over one of the at least two fin portions of the first fin, and forming a second gate structure and second source/drain regions over another of the at least two fin portions of the first fin.

Methods of forming FinFETs

Semiconductor devices having inactive fin field effect transistor (FinFET) structures and manufacturing and design methods thereof

Curved wafer processing on method and apparatus

A semiconductor apparatus includes fin field-effect transistor (FinFETs) having controlled fin heights. The apparatus includes a high fin density area and a low fin density area. Each fin density area includes fins and dielectric material between the fins. The dielectric material includes different dopant concentrations for different fin density areas and is the same material as deposited.

Method of forming fin field-effect transistors having controlled fin height

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Chu-Bei, Taiwan

Wen-Huei Guo