Mediatek Corporation

Wen-Hua Chang

Tse-Hsiang Hsu

Chia-Hua Chou

Tsung-Yi Chou

Chieh-Wei Liao

Tsun-Yuan Fan

A switched-capacitor circuit comprising a differential operational amplifier and a feedback circuit is described. In some embodiments, the feedback circuit may be configured to provide a reference voltage that is insensitive to temperature and/or process variations. In some embodiments, the feedback circuit may be configured to mitigate the time delay associated with one or more capacitors of the switched-capacitor circuit. The switched-capacitor circuit may be controlled by a pair of control signals. During a first phase, one or more capacitors may be charged, or discharged, through an input signal. During a second phase, the electric charge of the one or more capacitors may be retained.

Self-regulated reference for switched capacitor circuit

A current amplifier and a transmitter using the same. The current amplifier has a first and second transistor and a voltage level shifting unit. The first transistor has a gate receiving an input current and a drain receiving a driving current. The voltage level shifting unit providing a voltage shift is coupled between the drain of the first transistor and the gate of the second transistor. An output current is generated at the drain of the second transistor.

Current amplifier and transmitter using the same

A line driver and a method for driving a load are proposed. The line driver includes a current amplifier and a feedback network. The current amplifier has an input node arranged to receive an input current of the line driver, and an output node arranged to produce an output current. The feedback network is coupled between the input node and the output node of the current amplifier, wherein a portion of the output current of the line driver is guided to the feedback network, and an equivalent impedance obtained by looking into the output node of the current amplifier with the feedback network substantially equals an impedance of the load.

Line driver with active termination and associated method

An ADC is provided. The ADC includes a plurality of pre-amplifiers, dynamic comparators coupled to the pre-amplifiers, interpolators and an encoder. Each pre-amplifier provides a pair of differential outputs according to a pair of differential analog signals and a first reference voltage and a second reference voltage different from the first reference voltage. Each dynamic comparator provides a first comparing signal and a second comparing signal according to the pair of differential outputs of the corresponding pre-amplifier. Each interpolator provides an interpolating signal according to the first and second comparing signals of two of the dynamic comparators. The encoder provides a digital output according to the interpolating signals. The first and second comparing signals are the same in a reset phase, and the first and second comparing signals are complementary according to the pair of differential outputs of the corresponding pre-amplifier in an evaluation phase.

Flash ADC with interpolators

A current amplifier and a transmitter using the same. The current amplifier includes: a first transistor having a gate coupled to a former-stage circuit, a drain coupled to a current source, and a source biased at a constant voltage level; a second transistor having a gate coupled to the current source and having a source and a drain; a first impedance circuit coupled between the gate of the first transistor and the source of the second transistor; and a second impedance circuit coupled between the source of the second transistor and a ground terminal. The current amplifier receives an input current from the former-stage circuit and generates an output current at the drain of the second transistor. Note that no current source is connected to the source of the first transistor.

An analog-to-digital converter is provided. Each pre-amplifier provides a pair of differential outputs according to a pair of differential analog input signals and a first reference voltage and a second reference voltage from a resistor chain, wherein the first reference voltage is different from the second reference voltage. Each dynamic comparator provides a first comparing signal and a second comparing signal according to the pair of differential outputs of the pre-amplifier. Each pre-amplifier includes a first calibration unit for calibrating a first offset voltage from the pre-amplifier at the pair of differential outputs at a specific temperature, and a second calibration unit for calibrating a second offset voltage from the corresponding dynamic comparator at the pair of differential outputs.

Circuit and method for calibration of analog-to-digital converter

A signal generation apparatus includes a digital-to-analog converter, a bias stage and a class AB output stage. The digital-to-analog converter is arranged for outputting a current as an input signal. The bias stage is coupled to the digital-to-analog converter, and is arranged for generating a bias signal according to at least the input signal. The class AB output stage is coupled to the bias stage, and is arranged for generating an output signal at an output node of the signal generation apparatus according to the bias signal, wherein the output signal includes a first signal component and a second signal component, both the first signal component and the second signal component correspond to the input signal, and there is a linear relation between the output signal and the input signal.

Class AB signal generation apparatus

An analog to digital converter can operate in a sampling mode or in a comparing mode. The analog to digital converter comprises: a comparator; a first capacitor, comprising a first terminal coupled to a first input terminal of the comparator; a second capacitor; a first switch module; a control unit, for controlling the conductive states of the first switch module corresponding to the sampling mode or the comparing mode. The first capacitor samples a value of a first input signal and the second capacitor samples a value of a first reference signal via the first switch module in the sampling mode. The first capacitor and the second capacitor are not coupled to each other in the sampling mode. The first capacitor and the second capacitor are coupled in series via the first switch module in the comparing mode.

Analog to digital converter and signal converting method

A signal transmitting circuit includes: a signal generating circuit arranged to generate an output signal to a loading device according to an input signal; an adjusting circuit; and a matching circuit having a first port coupled to the adjusting circuit and a second port coupled to the signal generating circuit, wherein the second port is arranged to couple to the loading device so as to provide a matching impedance corresponding to the loading device; and the adjusting circuit is arranged to generate an adjusting signal of which a voltage applied on the first port is substantially equal to a voltage of the output signal applied on the second port.

Signal transmitting circuit and related method

A capacitor array includes a plurality of capacitor components each having a first node and a second node, and first nodes of the capacitor components are coupled to each other. A calibration method for the capacitor array utilizes a calibration capacitor component to couple the first nodes. Then, the calibration method determines a capacitance indication value regarding the specific capacitor component by coupling different references voltage to a second node of the specific capacitor component and coupling different test voltages to a second node of the calibration capacitor component. Accordingly, the calibration method calibrates the capacitance mismatches of the capacitor array in the digital domain.

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Tainan, Taiwan

Wen-Hua Chang