National Applied Research Laboratories

Avago Technologies International Sales Pte. Limited

Wen-Hsien Huang

Jia-Min Shieh

Chang-Hong Shen

Chih-Chao Yang

Tung-Ying Hsieh

Hao-Chung Kuo

Bau-Tong Dai

Jung Yan Huang

Szu-Hung Chen

Kwok Cheung Tsang

Shih-Chuan Wu

Tsung-Ta Wu

One or more implementations of the subject technology may enable a bond-on-pad (BoP) substrate technology that can eliminate the need to utilize a solder-on-pad (SoP) process. Unlike an SoP process, a BoP Process does not require a solder bump to be formed on a bump pad to attach a joint to a bump pad. The size of an opening on a bump pad for a BoP process may be larger than that of an SoP process. A BoP process may use a solder mask having multiple thicknesses and may be thinner near the bump pads. A BoP process may use a joint having a copper pillar and a solder cap. A BoP process can be used with an underfill or a molding compound technology.

Circuit packages and fabrication methods using bond-on-pad (BoP) substrate technology

A flexible substrate structure including a flexible substrate, a first dielectric layer, a metal-containing layer and a second dielectric layer is provided. The first dielectric layer is located on the flexible substrate. The metal-containing layer has a reflectivity greater than 15% and a heat transfer coefficient greater than 2 W/m-K. The metal-containing layer is disposed between the first dielectric layer and the second dielectric layer, and the second dielectric layer is an inorganic material layer. A flexible transistor including the above-mentioned flexible substrate structure and a method for fabricating the same are also provided.

Flexible substrate structure, flexible transistor and method for fabricating the same

A chipset with light energy harvester, includes a substrate, a functional element layer, and a light energy harvesting layer, both are stacked vertically on the substrate, and an interconnects connected between the functional element layer and the light energy harvesting layer.

Chip with light energy harvester

A transistor device structure includes a substrate, a first polycrystalline semiconductor thin film and a first transistor unit. The first polycrystalline semiconductor thin film is disposed on the substrate. A grain diameter of the first polycrystalline semiconductor thin film is greater than 1 micrometer and a thickness of the first polycrystalline semiconductor thin film is less than three hundredths of the grain diameter. The first transistor unit is disposed on the first polycrystalline semiconductor thin film and includes a first gate dielectric layer and a first gate structure. The first gate dielectric layer is disposed on a surface of the first polycrystalline thin film semiconductor. The first gate structure is disposed on a surface of the first gate dielectric layer.

Transistor device structure that includes polycrystalline semiconductor thin film that has large grain size

A transistor device structure includes a substrate, a first transistor layer and a second transistor layer. The second transistor layer is disposed between the substrate and the first transistor layer. The first transistor layer includes an insulating structure and a first transistor unit. The insulating structure is disposed on the second transistor layer and has a protruding portion. The first transistor unit includes a gate structure, a source/drain structure, an embedded source/drain structure and a channel. The source/drain structure is disposed beside the gate structure and over the insulating structure. The embedded source/drain structure is disposed underneath the source/drain structure and in the insulating structure. The channel is defined between the protruding portion and the gate structure.

Transistor device structure

The invention discloses a method for fabricating power-generating module with solar cell. The method includes the steps of providing a flexible substrate; forming a solar cell unit on the flexible substrate by using a high density plasma at a temperature lower than about 150&#xb0; C.; and forming a circuit unit on the flexible substrate; wherein the solar cell unit is coupled to the circuit unit, so as to provide the power needed for the operation of the circuit unit.

Method for fabricating power-generating module with solar cell

A light-trapping layer is integrated into a thin-film solar cell. It is integrated as a light-inlet layer, an intermediate layer or a shaded layer with nano-particles embedded in a transparent or non-transparent conductive film. Thus, light stays longer in an absorption layer with photocurrent increased; defects of interface between the absorption layer and the nano-material are decreased; anti-reflective effect to inlet light is enhanced; and a good integrity and a good reliability for long-time light-shining are obtained.

Growing community of inventors

Hsinchu, Taiwan

Wen-Hsien Huang