United Microelectronics Corp.

Fujian Jinhua Integrated Circuit Co., Ltd.

Wen-Chieh Lu

Li-Wei Feng

Chien-Ting Ho

Ying-Chiao Wang

Yi-Wei Chen

Fu-Che Lee

Wei-Hsin Liu

Chia-Lung Chang

Po-Chun Chen

Tzu-Chin Wu

Tsung-Ying Tsai

Jui-Min Lee

Po-Han Wu

Kai-Ping Chen

Li-Wei Liu

Feng-Yi Chang

Chien-Cheng Tsai

Tzu-Tsen Liu

A semiconductor memory device includes a semiconductor substrate, bit line structures, storage node contacts, isolation structures, a first spacer, a second spacer, and a third spacer. Each bit line structure is elongated in a first direction. The bit line structures are repeatedly arranged in a second direction. Each storage node contact and each isolation structure are disposed between two adjacent bit line structures. The first spacer is partly disposed between each isolation structure and the bit line structure adjacent to the isolation structure and partly disposed between each storage node contact and the bit line structure adjacent to the storage node contact. The second spacer is disposed between each storage node contact and the first spacer. The third spacer is disposed between each storage node contact and the second spacer. A thickness of the third spacer is less than a thickness of the second spacer in the second direction.

Semiconductor memory device and manufacturing method thereof

A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.

Manufacturing method of semiconductor memory device

A method for fabricating semiconductor device includes the steps of: forming a first bit line structure on a substrate; forming a first spacer adjacent to the first bit line structure; forming an interlayer dielectric (ILD) layer adjacent to the first spacer; removing part of the ILD layer and part of the first spacer to expose a sidewall of the first bit line structure; and forming a first storage node contact isolation structure adjacent to the first bit line structure, wherein the first storage node contact isolation structure contacts the first bit line structure and the first spacer directly.

Semiconductor device and method for fabricating the same

A manufacturing method of a semiconductor memory device includes following steps. Bit line structures and storage node contacts are formed on a semiconductor substrate. A first sidewall spacer is formed on sidewalls of each bit line structure. A conductive layer covering the bit line structures, the first sidewall spacer, and the storage node contacts is formed. A first patterning process is preformed to the conductive layer for forming stripe contact structures. Each stripe contact structure is elongated in the first direction and corresponding to the storage node contacts. The first sidewall spacer at a first side of each bit line structure is exposed by the first patterning process. The first sidewall spacer at a second side of each bit line structure is covered by the stripe contact structures. The first sidewall spacer exposed by the first patterning process is removed for forming first air spacers.

Semiconductor memory device

Growing community of inventors

Taoyuan, Taiwan

Wen-Chieh Lu