Taiwan Semiconductor Manufacturing Comp. Ltd.

Yageo Corporation

Wen-Cheng Wu

Yi-Wei Chiu

Han-Ti Hsiaw

Shin-Yeu Tsai

Kuan-Cheng Wang

Chih-Hung Sun

Jr-Yu Chen

Tai-Chun Huang

Chia-Hui Lin

Bo-Cyuan Lu

Sung-En Lin

Kai Hung Cheng

Dong-Sheng Li

Yao-Hsu Sun

Tsai-Hu Chen

Wen-Fon Wu

Mei-Ling Lin

Wen-Hsing Kong

Chih-Chung Yang

A four-layer photoresist and method of forming the same are disclosed. In an embodiment, a method includes forming a semiconductor fin; depositing a target layer on the semiconductor fin; depositing a BARC layer on the target layer; depositing a first mask layer over the BARC layer, the first mask layer being deposited using a plasma process with an RF power of less than 50 W; depositing a second mask layer over the first mask layer using a plasma process with an RF power of less than 500 W; depositing a photoresist layer over the second mask layer; patterning the photoresist layer, the second mask layer, the first mask layer, and the BARC layer to form a first mask; and selectively removing the target layer from a first portion of the semiconductor fin using the first mask, the target layer remaining on a second portion of the semiconductor fin.

Semiconductor device and method

A method includes performing an implantation on a portion of a first layer to form an implanted region, and removing un-implanted portions of the first layer. The implanted region remains after the un-implanted portions of the first layer are removed. An etching is then performed on a second layer underlying the first layer, wherein the implanted region is used as a portion of a first etching mask in the etching. The implanted region is removed. A metal mask is etched using the second layer to form a patterned mask. An inter-layer dielectric is then etched to form a contact opening, wherein the patterned mask is used as a second etching mask.

Contact openings and methods forming same

The present invention relates to a chip resistor and method for making the same. The chip resistor includes a substrate, a pair of bottom electrodes, a resistive film, a pair of main upper electrodes, a first protective coat, a pair of barrier layers, a second protective coat, a pair of side electrodes and at least one plated layer. The first protective coat is disposed over the resistive film, and covers part of the main upper electrodes. The barrier layers are disposed on the main upper electrodes, and cover part of the first protective coat. The second protective coat is disposed on the first protective coat, and covers part of the barrier layers. The plated layers cover the barrier layers, the bottom electrodes and the side electrodes. As a result, the chip resistor features high corrosion resistance.

Chip resistor and method for making the same

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Kaohsiung, Taiwan

Wen-Cheng Wu