Nvidia Corporation

Weizhong Xu

Brett Coon

Stuart F Oberman

John R Nickolls

Ming Yiu Siu

Peter C Mills

Jerome Francis Duluk, Jr

Henry Packard Moreton

Steven E Molnar

Bengt-Olaf Schneider

Daniel P Wilde

Mark J French

Jonathan J Dunaisky

A memory is used by concurrent threads in a multithreaded processor. Any addressable storage location is accessible by any of the concurrent threads, but only one location at a time is accessible. The memory is coupled to parallel processing engines that generate a group of parallel memory access requests, each specifying a target address that might be the same or different for different requests. Serialization logic selects one of the target addresses and determines which of the requests specify the selected target address. All such requests are allowed to proceed in parallel, while other requests are deferred. Deferred requests may be regenerated and processed through the serialization logic so that a group of requests can be satisfied by accessing each different target address in the group exactly once.

Shared single-access memory with management of multiple parallel requests

Concurrent threads in a multithreaded processor share access to a memory, with any location in the shared memory being accessible by any thread. In one embodiment, the shared memory has multiple independently-addressable memory banks, and one location per bank can be accessed in parallel. Parallel processing engines executing the threads generate a group of parallel memory access requests. Address conflict logic determines whether the requests can be satisfied in parallel (e.g., based on bank access constraints) and serializes the requests to the extent needed to avoid conflicts. In some embodiments, data read from one address in the shared memory can be broadcast to multiple processing engines.

Shared memory with parallel access and access conflict resolution mechanism

A technique for handling floating-point special values, e.g., Infinity, NaN, &#x2212;Zero, and denorms, during blend operations is provided so that blend operations on fragment color values that contain special values can be performed in compliance with special value handling rules. In particular, the presence of special values is detected or the potential presence of special values is detected. This information is used to qualify when blend optimizations may be performed, so that floating point blend operations can remain conformant to special value handling rules.

Blend optimizations that are conformant to floating-point rules

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Fremont, CA, United States of America

Weizhong Xu