Eastman-kodak Company

Omnivision Technologies, Inc.

Weize Xu

Ravi K Mruthyunjaya

Robert Michael Guidash

R Michael Guidash

An image sensor includes a unit cell having a plurality of pixels; the unit cell comprising an amplifier input transistor that is shared by the plurality of pixels; a plurality of floating diffusions that are joined by a floating diffusion interconnect layer and are connected to the amplifier input transistor; and an interconnect layer which forms an output signal wire which shields the floating diffusion interconnect layer.

CMOS shared amplifier pixels with output signal wire below floating diffusion interconnect for reduced floating diffusion capacitance

An image sensor includes a photosensitive region that accumulates charge corresponding to received incident light; a transfer gate for transferring charge from the photosensitive region; a voltage supply having an increasing voltage over time; a floating diffusion for receiving the charge from the photosensitive region and converting the charge to a voltage; an amplifier for receiving and amplifying a signal from the floating diffusion; a comparator for comparing a voltage from the amplifier to a reference voltage; and a counter for counting clock cycles between initiation of the increasing voltage until a signal is received from the comparator indicating charge transfer from the photosensitive region to the floating diffusion; wherein a digital signal is generated that represents an unfilled capacity of the photosensitive region.

Pixel analog-to-digital converter using a ramped transfer gate clock

An image sensor includes a plurality of pixels for capturing an image; a sample and hold circuit array having a plurality of units for receiving signals from the plurality of pixels representing the captured image; a decoder for selecting each of the units of the sample and hold circuit array for output; and a delay circuit that includes an adjustable time delay to the decoder for compensating for time delays.

Delay management circuit for reading out large S/H arrays

A CMOS image sensor includes a plurality of pixels arranged in an array; a plurality of sample and hold arrays; and a routing matrix which routes a signal from each pixel to one of the sample and hold arrays in a predetermined order.

Pixel array output routing structure for multi-channel CMOS imager sensors

An image sensor includes a plurality of pixels for capturing incident light that is converted to a signal representing an image; wherein noise is combined with a signal representing both the image and a reset level; a plurality of dark reference pixels that generate noise that substantially correspond or equally correspond to the noise in the image and reset level; and a sample and hold circuit that reads out the image signal and cancels or substantially cancels out the noise from the image signal and reset level by canceling the noise from image and reset level with the noise generated from the dark reference pixels.

Low noise sample and hold circuit for image sensors

An image sensor includes a photosensitive region that accumulates charge corresponding to received incident light; a transfer gate for transferring all or a portion of the charge from the photosensitive region; a voltage supply having an increasing voltage over time that is applied to the transfer gate; a floating diffusion for receiving the all or a portion of the charge from the photosensitive region and converting the charge to a voltage; an amplifier for receiving and amplifying a signal from the floating diffusion; a pulse detector for detecting a voltage pulse from the amplifier; and a counter for counting clock cycles between initiation of the increasing voltage until a signal is received from the detector which indicates initiation of charge transfer from the photosensitive region to the floating diffusion.

Ultra-small CMOS image sensor pixel using a photodiode potential technique

A method of making an image sensor, the method includes the steps of providing a plurality of pixels each with a photodetector; providing an amplifier that is shared between the plurality of photodetectors; providing a transfer gate associated with each photodetector; providing a charge-to-voltage conversion region that is shared between the plurality of photodetectors; determining a capacitance between each transfer gate and the charge-to-voltage conversion region; and modifying the capacitance to be substantially the same by altering a physical structure within one or more pixels.

Shared amplifier pixel with matched coupling capacitances

A correlated double sampling unit within a CMOS imager employs an image sensor having a plurality of photodetectors arranged in a series of rows and columns with a row addressing circuit, a column addressing circuit, a first sample and hold circuit allocated for each of the columns, a transfer circuit operatively connecting each of the columns to the first sample and hold circuit for each of the columns, and a plurality of second sample and hold circuits, each of the second sample and hold circuits being operatively connected to a subset of the first sample and hold circuits.

High speed CMOS imager column CDS circuit

A CMOS imager is arranged in a plurality of rows and columns with a gain compensation circuit supplied for each of the column. The gain compensation circuit has a first source follower circuit that employs majority carriers of a first polarity yielding a first voltage gain, and a second source follower circuit employing majority carriers of second polarity opposite the first polarity yielding a voltage gain that is essentially the opposite of the first voltage gain variation as compared to the input voltage. The input to the second source follower circuit that is electrically coupled to the output of the second source follower circuit resulting in a gain compensation between the first and second source follower circuits. A selection circuit is configured to enable the gain compensation circuit upon activation of a column select signal.

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Rochester, NY, United States of America

Weize Xu