Loongson Technology Corporation Limited

Longsoon Technology Corporation Limited

Weiwu Hu

Xiaoyu Li

Guojie Li

Ge Zhang

Menghao Su

The present invention discloses a RISC processor and a method of processing flag bits of a register in the RISC processor. Said RISC processor comprises a physical register stack, an operating component connected to the physical register stack and an decoder connected to the operating component; the physical register stack comprises an emulation flag register for emulating to realize flag bits of a flag register in a CISC processor; the operating component comprises a flag read-write module for reading and writing the values of the flag bits of the emulation flag register. The operating component further comprises an operating controller for performing an operation control according to the values of the flag bits of the emulation flag register when the RISC processor is in the working mode of X86 virtual machine during an operation process.

RISC processor and its register flag bit processing method

A RISC processor apparatus and method for supporting an X86 virtual machine. The RISC processor includes: an instruction module for storing a virtual machine instruction set that supports the X86 virtual machine; a decoder for, during the decoding of an instruction of the virtual machine instruction set, distinguishing the virtual machine instruction set mode of the instruction, decoding the instruction according to the distinguished virtual machine instruction set mode, and outputting the decoded instruction to a fixed-point operation component or a floating-point operation component according to the distinguished virtual machine instruction set mode; the fixed-point operation component for processing the fixed-point instruction of the virtual machine instruction set according to the output of the decoder and outputting the execution result; the floating-point operation component for processing the floating-point instruction of the virtual machine instruction set according to the output of the decoder and outputting the execution result.

RISC processor apparatus and method for supporting X86 virtual machine

A multi-core processor and a frequency conversion device thereof as well as a method of communication between the cores are disclosed. Each processor core of the multi-core processor includes a frequency conversion device, which includes a multi-bit state changing means, a multiple selector, a frequency conversion coefficient register, a multi-input OR gate and a clock-gating circuit unit. A common original clock is sent to the frequency conversion device of each processor core at work. The frequency conversion device real-timely reads the value of the frequency conversion coefficient register of a corresponding processor core and receives data transmission valid signals from other processor cores. By gating the common original clock, a frequency conversion function of the processor core is completed. In the invention, the dynamic frequency conversion function of a multi-core processor is achieved, the frequency conversion coefficient control may be performed by each processor core independently, and a highly effective synchronous communication may be maintained between the processor cores, so as to reduce the overall running consumption of the processor and save power on different processor cores of the multi-core processor or on different IP modules in SOC.

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Beijing, China

Weiwu Hu