Boe Technology Group Co., Ltd.

Ordos Yuansheng Optoelectronics Co., Ltd.

New H3c Technologies Co., Ltd.

K-tronics (suzhou) Technology Co., Ltd.

Army Academy of Armored Forces of Pla

Weifeng Wang

Guoqing Zhang

Xiaowei Wang

Hongxia Yang

Pucha Zhao

Hongwei Gao

Zhixin Guo

Yanbin Dang

Ke Zhao

Xiaopeng Bai

Haotian Chen

Longfei Yang

Meili Guo

Feiwen Tian

Xingliang Wang

Shengchang Shen

Zijian Guo

Lei Wang

Xi Wang

Jie Wu

Yu Fu

Zhihui Jia

Xingpeng Yan

Xiaoyu Jiang

Yan Zong

Xuepeng Ji

Chenwei Wang

Yan Mao

Yunpeng Liu

Qiang Qu

Yuanhang Huang

A backlight module includes a front frame (), a screen (), and a flexible buffer layer () located between the front frame () and the screen (). In a direction from the front frame () to the screen (), a gap between the front frame () and the screen () is filled with the flexible buffer layer (); and the flexible buffer layer () is in an elastic compression state.

Backlight module and display device

The present disclosure relates to the technical field of display devices, in particular, to a rear housing assembly and a display device. The rear housing assembly includes: a rear housing, a back plate, and a connecting assembly. The back plate and the rear housing are disposed oppositely in a thickness direction of the display device. The connecting assembly includes a first connecting part and a second connecting part. One of the first connecting part and the second connecting part is coupled to the rear housing, and the other is coupled to the back plate. The first connecting part includes a limiting cavity extending in the thickness direction, the second connecting part includes a limiting engaging portion, the limiting engaging portion extends into the limiting cavity, and the limiting engaging portion is engaged with the first connecting part.

Rear housing assembly and display device

An integrated imaging display system is provided. The integrated imaging display system includes: a light source, a converging lens, an illumination microlens array, and a projection microlens array, where illumination microlens units in the illumination microlens array and projection microlens units in the projection microlens array are disposed in a one-to-one correspondence, and the converging lens converts all light emitted by the light source into parallel light and then irradiates the parallel light to the illumination microlens array; a sub-image is provided on a side of each of the illumination microlens units close to the projection microlens unit; all light emitted by each of the illumination microlens units is irradiated on a corresponding projection microlens unit after passing through the sub-image, and the projection microlens array displays an image of the sub-image.

Integrated imaging display system

A substrate, a panel, a detection device and an alignment detection method are provided. The substrate includes first signal connection pins arranged in parallel side by side and at least one first alignment detection pin, wherein the at least one first alignment detection pin is located on at least one side of the first signal connection pins in an arrangement direction of the first signal connection pins, and arranged in parallel with the first signal connection pins.

Substrate, panel, detection device and alignment detection method

A Software Defined Network (SDN) controller receives a detecting packet reported by a first switch and initiated by a first device. The SDN controller sends, for each of switches having an SDN connection with the SDN controller, the detecting packet and information of all downlink ports of the switch to the switch in a way that the switch is capable of sending the detecting packet through the downlink port. The SDN controller receives a response packet which is sent by a second switch and initially generated by a second device in response to receiving the detecting packet from the second switch, wherein an IP address of the second device matches a destination IP address of the detecting packet. The SDN controller sends forwarding configuration information to the second switch in a way that the second switch is capable of configuring a port through which the response packet is received.

Device detection

The present disclosure relates to a method and system for performing aging process on the transistor in the display panel. A method for performing aging process on a transistor in a display panel, comprising: obtaining an initial characteristic curve of the transistor; determining an initial cutoff voltage range of the transistor according to the obtained initial characteristic curve; determining a gate-source voltage and a drain-source voltage required by the transistor according to the initial cutoff voltage range, so as to increase an cutoff voltage range of the transistor; and performing aging process on the transistor according to the determined required gate-source voltage and drain-source voltage.

Method and system for aging process on transistors in a display panel

The present disclosure belongs to the field of display technology, and particularly relates to a test circuit, a display substrate, a test method of a display substrate and a display apparatus. The test circuit includes a signal generating device and a plurality of output channels that are mutually independent. Each output channel includes a signal line configured to transmit a test signal. The signal generating device is coupled to the plurality of output channels, and is configured to provide, to each of at least one of the plurality of output channels, the test signal corresponding to an impedance of the signal line in the output channel, and provide the test signal to the signal line in the output channel.

Test circuit, display substrate, test method thereof and display apparatus

A defect detection circuit and a defect detection method for a light-emitting element, a display driving device, a display device, and a defect detection method for the display device are provided. The defect detection circuit includes a power source signal adjustment sub-circuit, a data signal adjustment sub-circuit, a first initial signal adjustment sub-circuit, a second initial signal adjustment sub-circuit and a storage capacitor connected to a control end of a driving transistor. The storage capacitor is configured to control the driving transistor to be turned off under the effect of a power source signal, a data signal and an initial signal, to enable the second initial signal adjustment sub-circuit to apply the initial signal to a light-emitting sub-circuit, thereby to enable the light-emitting sub-circuit to emit light. The display driving device includes the defect detection circuit.

Defect detection circuit and method for light-emitting element, display driving device, display device and defect detection method thereof

A detecting apparatus and method, repairing apparatus and method, and repairing system of AMOLED display device are provided. The detecting apparatus includes: an illuminating device for sequentially illuminating a plurality of detection regions of a screen of the AMOLED display device, the screen being divided into the plurality of detection regions, each of the detection regions including at least one light-emitting unit; a current detecting device for acquiring a detection current which is a sum of driving currents of the light-emitting unit in the detection region being illuminated; and a judging device for judging whether the detection region corresponding to the detection current is a defective region according to the detection current. The apparatus can detect luminance uniformity of the AMOLED display device. The detection efficiency is high, the detection standard is unified and the detection accuracy is high.

Detecting apparatus and method, repairing apparatus and method, and repairing system of AMOLED display device

The present disclosure provides a signal loading method and a signal generator. The signal loading method includes: loading a first pair of voltage signals to at least one pair of separate signal channels for a time period, respectively, wherein the first pair of voltage signals have a first voltage difference therebetween; and determining whether a short circuit occurs in the at least one pair of signal channels within the time period, and if it is determined that no short circuit occurs in the at least one pair of signal channels within the time period, loading a second pair of voltage signals having a second voltage difference therebetween to the at least one pair of signal channels at the end of the time period. The second voltage difference is greater than the first voltage difference.

Signal loading method and signal generator

Examples of the present disclosure provide a VM packet controlling method and apparatus, applicable for an OpenStack network. The OpenStack network includes an OpenStack controller node, an OpenStack compute node, and a virtual network system. The OpenStack network is communicatively connected with an SDN controller, the virtual network system includes a VM and a virtual network apparatus responsible for forwarding packets of the virtual machine. The OpenStack controller node creates a port for the VM, informs the SDN controller of a port UUID and a forwarding rule applied on the port; the OpenStack controller node receives a port ID, and transmits a corresponding relationship between the port ID and the port UUID to the SDN controller, the SDN controller generates a flow table according to the forwarding rule applied on the port, and issues the flow table to the virtual network apparatus according to the corresponding relationship.

Controlling packets of virtual machines

The present application discloses a circuit board and a method for manufacturing the same, and a terminal test device. The circuit board includes a base substrate, and a plurality of conductive lines on the base substrate, each of the plurality of conductive lines having one end configured to be connected with a signal output bus of a signal generator and the other end configured to be connected with a terminal. A fuse is connected in series in each conductive line, and a breaking current IT of the fuse, a maximum operating current I of the conductive line and a fault current IF of the conductive line satisfy: I&#x3c;IT&#x2264;IF, where the breaking current IT of the fuse is a minimum current that causes the fuse to open.

Circuit board and method for manufacturing the same, terminal test device

Growing community of inventors

Beijing, China

Weifeng Wang