Northrop Grumman Systems Corporation

Northrop Grumman Space & Mission Systems Corporation

Weidong Liu

Roger S Tsai

Po-Hsin Liu

Jane Lee

Wayne Yoshida

Jennifer Wang

Linh Dang

Michael Edward Barsky

Richard Lai

Yeong-Chang Chou

Xiaobing Mei

Sumiko L Poust

Mike Barsky

Gerry Mei

Rich Lai

A semiconductor device is provided that comprises a base structure, a first channel layer overlying the base structure, a second channel layer overlying the first channel layer, and first, second, and third ohmic contacts overlying the second channel layer. The semiconductor device further comprises a metal-semiconductor heterodimension field effect transistor that is formed between the first and second ohmic contacts, the metal-semiconductor heterodimension field effect transistor including a first gate formed through the first and second channel layers. The semiconductor device yet further comprises a high electron mobility transistor formed between the second and third ohmic contacts, the high electron mobility transistor including a second gate formed through the second channel layer without extending through the first channel layer.

Metal-semiconductor heterodimension field effect transistors (MESHFET) and high electron mobility transistor (HEMT) based device and method of making the same

An exemplary FET includes a base and first and second stacked layer groups each having a nonconductive layer and a semiconductive layer adjacent the nonconductive layer. Source and drain electrodes are in low resistance contact with the semiconductive layers. First and second parallel trenches extend vertically between the source and drain electrodes to create access to first and second edges, respectively, of the layers. A 3-dimensional ridge is defined by the layers between the first and second trenches. A continuous conductive side gate extends generally perpendicular to the trenches and engages the first edges, the top of the ridge and the second edges. A gate electrode is disposed in low resistance contact with the conductive side gate. The figure of merit for the FET increases as the number of layer groups increases. A plurality of parallel spaced apart ridges, all engaged by the same side gate, can be utilized.

Multiple layer side-gate FET switch

In a method of forming a semiconductor device on a semiconductor substrate (), a photoresist layer () is deposited on the semiconductor substrate; a window () is formed in the photoresist layer () by electron beam lithography; a conformal layer () is deposited on the photoresist layer () and in the window (); and substantially all of the conformal layer () is selectively removed from the photoresist layer () and a bottom portion of the window to form dielectric sidewalls () in the window ().

High electron mobility transistor semiconductor device and fabrication method thereof

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San Marino, CA, United States of America

Weidong Liu