Omnivision Technologies, Inc.

Wei Zheng

Yin Qian

Howard E Rhodes

Vincent Venezia

Hsin-Chih Tai

Duli Mao

Keh-Chiang Ku

Dyson Hsinchih Tai

Chen-Wei Lu

Hongjun Li

Gang Chen

Tiejun Dai

Jin Li

Lindsay Alexander Grant

Chih-Wei Hsiung

Sing-Chung Hu

Liping Deng

Chia-Ying Liu

Dyson Hsin-Chih Tai

Manoj Bikumandla

Wu-Zang Yang

Young Woo Jung

Chun-Yung Ai

Xueqing Wang

Zhibin Xiong

An image sensor includes a plurality of photodiodes disposed in a semiconductor material to convert image light into image charge. A floating diffusion is disposed proximate to the plurality of photodiodes to receive the image charge from the plurality of photodiodes. A plurality of transfer transistors is coupled to transfer the image charge from the plurality of photodiodes into the floating diffusion in response to a voltage applied to the gate terminal of the plurality of transfer transistors. A first trench isolation structure extends from a frontside of the semiconductor material into the semiconductor material and surrounds the plurality of photodiodes. A second trench isolation structure extends from a backside of the semiconductor material into the semiconductor material. The second trench isolation structure is disposed between individual photodiodes in the plurality of photodiodes.

Image sensor with dual trench isolation structures at different isolation structure depths

Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively transfer the image charge from the photosensitive element to the floating diffusion region. The transfer device includes a buried channel device including a buried channel gate disposed over a buried channel dopant region. The transfer device also includes a surface channel device including a surface channel gate disposed over a surface channel region. The surface channel device is in series with the buried channel device. The surface channel gate has the opposite polarity of the buried channel gate.

Partial buried channel transfer device for image sensors

An image sensor includes a semiconductor layer with a plurality of photodiodes. A plurality of isolation structures is disposed in the back side of the semiconductor layer between individual photodiodes in the plurality of photodiodes. The plurality of isolation structures extend into the back side of the semiconductor layer a first depth and extend out of the back side of the semiconductor layer a first length. A plurality of light filters is disposed proximate to the back side of the semiconductor layer such that the plurality of isolation structures is disposed between individual light filters in the plurality of light filters. An antireflection coating is also disposed between the semiconductor layer and the plurality of light filters.

Self-aligned isolation structures and light filters

A color filter array for use on a color image sensor includes an oxide grid having sidewalls arranged to define openings in the oxide grid. Each one of the openings is to be disposed over a corresponding pixel cell of the color image sensor. Oxide support structures are disposed in an interior region of each opening in the oxide grid over a corresponding pixel cell of the color image sensor. The openings in the oxide grid are filled with color filter material of a corresponding color filter. A surface tension between each oxide support structure and the surrounding color filter material of the color filter is adapted to provide uniform thickness for the color filters within the corresponding openings in the oxide grid.

Color filter array with support structures to provide improved filter thickness uniformity

A method for manufacturing a backside illuminated color image sensor includes (a) modifying the frontside of an image sensor wafer, having pixel arrays, to produce electrical connections to the pixel arrays, wherein the electrical connections extend depth-wise into the image sensor wafer from the frontside, and (b) modifying the backside of the image sensor wafer to expose the electrical connections.

Backside illuminated color image sensors and methods for manufacturing the same

An image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident through a first side of the image sensor to collect an image charge. The stress adjusting layer is disposed over the first side of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.

Backside illuminated image sensor with stressed film

Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.

Pad design for circuit under pad in semiconductor devices

A backside illuminated ('BSI') complementary metal-oxide semiconductor ('CMOS') image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident on a backside of the BSI CMOS image sensor to collect an image charge. The stress adjusting layer is disposed on a backside of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.

An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array.

Image sensor with improved black level calibration

An operational amplifier with two pairs of differential inputs for use with an input switch capacitor network. The operational amplifier has reset devices for resetting the second pair of differential inputs while amplifying the first pair of differential inputs, and for resetting the first pair of differential inputs while amplifying the second pair of differential inputs for reducing memory effect in electronic circuits. In an embodiment, the amplifier has an additional reset device for resetting the outputs during a prophase of amplifying the first pair of differential inputs and a prophase of amplifying the second pair of differential inputs.

OP-AMP sharing with input and output reset

Embodiments of a method for separating dies from a wafer having first and second sides. The process embodiment includes masking the first side of the wafer, the mask including openings therein to expose parts of the first side substantially aligned with scribe lines of the wafer. The process embodiment also includes etching from the exposed parts of the first side of the wafer until an intermediate position between the first and second sides and sawing the remainder of the wafer, starting from the intermediate position until reaching the second surface.

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Los Gatos, CA, United States of America

Wei Zheng