Other

Advanced Micro Devices Corporation

Integrated Memory Logic, Inc.

Piconetics, Inc.

Wei Zhang

Mark T Ramsbey

Mark W Randolph

Arvind Halliyal

Jianbin Wu

Fred T K Cheung

Henry H Yuan

Ding Hsu Yen

Feng Chen

We have developed a female condom and applicator apparatus that makes female condom easier to apply and more comfortable to use throughout the entire process. Several embodiments take advantage of traditional female tampon applicator structure and existing female condom design. This is easier for female users to adopt due to their already familiarity with similar device and their usage. One design has the applicator on the inside of the female condom which makes the applicator reusable. Another design has the entire female condom tucked inside the applicator, with the condom inner ring inside the applicator outer tube and condom outer ring inside applicator's inner ring. Another design has strings attached to the condom outside ring to keep it from moving or make noise. The device provides a low cost, easy to use, no side-effects, and ready-for-mass adoption solution for the market.

User friendly female condom and applicator

Various circuits, including DC/DC converters can include an integrated soft-start circuit. The integrated soft-start circuit includes a PMOS transistor configured to receive a reference signal and control the current to a bipolar junction transistor when the reference signal is in a first state. First and second NMOS transistors are included in the soft-start circuit, and receive the reference signal to turn off (to release from reset) when the reference signal is in the first state. A capacitor coupled in parallel with one of the NMOS transistors controls the soft-start signal. Various different transistors types can be used depending on the desired implementation.

Integrated soft start circuits

A single bit line, pulse-operated memory cell. The memory cell includes a first and second inverter, write access and feedback-control transistors, and read access transistor and read buffer transistors. The output of the first inverter is connected to the input of the second inverter and the output of the second inverter is connected to the input of the first inverter through the channel of the feedback-control transistor. The write access and feedback-control transistors are opposite types, and their gates are connected together so that when the feedback control transistor is on the write-access transistor is off and visa versa. Writing the cell thus avoids contending the with the on-transistor of the second inverter. The output of the cell is sensed by the gate of the buffer transistor and coupling the output of the buffer transistor through the read access transistor to the read output line.

Pulse driven single bit line SRAM cell

A process for fabrication of a semiconductor device including a modified ONO structure, comprising forming the modified ONO structure by providing a semiconductor substrate; forming a first dielectric material layer on the semiconductor substrate; depositing a silicon nitride layer on the first dielectric material layer; and forming a top dielectric material layer, wherein at least one of the bottom dielectric material layer and the top dielectric material layer comprise a mid-K or a high-K dielectric material. The semiconductor device may be, e.g., a SONOS two-bit EEPROM device or a floating gate flash device including the modified ONO structure.

Use of high-K dielectric material in modified ONO structure for semiconductor devices

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Sunnyvale, CA, United States of America

Wei Zhang