Via Technologies, Inc.

Via Labs, Inc.

Hon Hai Precision Industry Co., Ltd.

Wei-Yu Wang

Yu-Chung Wei

Cheng-Ming Ying

Yinglien Cheng

Jiin Lai

You-Ming Chiu

Hsin-Chieh Lin

Jyhfong Lin

Yu-Lung Lin

Yen-Yu Chen

Shih-Wei Chao

Yu-Lang Chang

Tse-Hsien Yeh

Hung-Hao Shen

Cheng-Min Hung

Woei-Harng Lin

Yi-Jan Wang

A voltage comparator and an operation method thereof are provided. The voltage comparator includes an amplifying circuit, a reference current source, and a transient current source. A first input terminal and a second input terminal of the amplifying circuit respectively receive a first corresponding voltage corresponding to a target voltage and a reference voltage. The reference current source is coupled to the amplifying circuit to provide a reference current. The transient current source is coupled to the amplifying circuit to selectively provide a transient current. The transient current source detects a transition of a second corresponding voltage corresponding to the target voltage to dynamically adjust the transient current. Therefore, when a rapidly increasing voltage occurs in the target voltage, the transient current source may temporarily increase the current of the amplifying circuit, thereby accelerating the response speed of the amplifying circuit.

Voltage comparator and operation method thereof

A terminating resistor circuit of a USB port and an operation method thereof are provided. The terminating resistor circuit includes a terminating resistor, a terminating switch, and an energy storage control circuit. The terminating resistor and the terminating switch are connected in series between a configuration channel pin of the USB port and a first reference voltage, and the energy storage control circuit is coupled to a control end of the terminating switch. During a charging period in a configuration detection period, the energy storage control circuit stores charge from the configuration channel pin to obtain a stored electrical energy, and during a discharging period in the configuration detection period, the energy storage control circuit turns on the terminating switch by using the stored electrical energy.

Terminating resistor circuit of USB port and operation method thereof

The USB chipset including a data processing unit, a transmitting unit, a first pin set and a second pin set is provided. The data processing unit generates a plurality of transmission information according to first information provided by a first device. The transmitting unit processes the transmission information to generate an output signal. The first pin set is configured to transmit the output signal to a second device. The second pin set is configured to transmit the output signal to the second device. When the first pin set transmits the output signal to the second device, the second pin set does not transmit the output signal to the second device. When the second pin set transmits the output signal to the second device, the first pin set does not transmit the output signal to the second device.

USB chipset

A current sensor includes a current sensing resistor, a first transistor, a second transistor, a bias voltage generating circuit, and a current mirror. The first terminal of the first transistor is coupled to the first terminal of the current sensing resistor. The first terminal of the second transistor is coupled to the second terminal of the current sensing resistor. The bias voltage generating circuit supplies a first bias voltage to the control terminal of the first transistor and a second bias voltage to the control terminal of the second transistor. The first bias voltage and the second bias voltage are dependent on the voltage of the first input terminal or the voltage of the second input terminal. The two current terminals of the current mirror are coupled to the second terminals of the second transistor and the first transistor, respectively.

Current sensor

A high speed internal hysteresis comparator is provided. Impedance supply units are disposed at control terminals of transistors of an active load of a differential amplifier of the high-speed hysteresis comparator, such that a gain when the transistors operate in an active region and a responding speed of the high-speed hysteresis comparator are increased.

High-speed internal hysteresis comparator

A USB chipset coupled between a first device and a second device is provided. A data processing unit is coupled to the first device and generates a plurality of transmission information according to first information provided by the first device. A transmitting unit is coupled to the data processing unit to transmit the transmission information to the second device and includes a converting module, a first output driving module, a second output driving module, and a transmitting-terminal selecting module. The converting module is coupled to the data processing unit to receive the transmission information in parallel and serially outputs the transmission information. The first output driving module is coupled to a first pin set. The second output driving module is coupled to a second pin set. The transmitting-terminal selecting module is coupled between the converting module and the first and second output driving modules.

A phase detecting apparatus and a phase adjusting method are provided. Determine whether to output a phase adjusting control signal according to a first data sampling value, a second data sampling value and a third data sampling value that are successively generated, so as to adjust a phase of a sampling clock signal used to sample a data signal.

Phase detecting apparatus and phase adjusting method

An optical transceiver module coupled to a device is provided. The optical transceiver module includes an electronic signal transmitting terminal coupled to a receiving terminal of the device, an electronic signal receiving terminal coupled to a transmitting terminal of the device, an optical signal receiving terminal coupled to the electronic signal transmitting terminal, and an optical signal transmitting terminal coupled to the electronic signal receiving terminal. When the optical transceiver module is at an normal operation state and the electronic signal receiving terminal does not receive any electronic signal over a first predetermined time period, the optical transceiver module enters a idle detection state to make the electronic signal transmitting terminal to perform a receiver termination detection to the device to determine whether the device is coupled to the optical transceiver module. At the idle detection state, the optical signal transmitting terminal transmits the optical signal continuously.

Optical transceiver modules, optical transmission devices, and optical transmission methods

A transmission circuit including an equalizer circuit, a slicer circuit, a signal detection circuit, and a control circuit is provided. The equalizer circuit performs an equalizing operation on an input signal according to preset states to output an equalizing signal corresponding to each preset state. The slicer circuit performs a slicing operation on the equalizing signal to output a slicing signal. The signal detection circuit detects and compares the equalizing signal and the slicing signal and accordingly adjusts the equalizer circuit to one of the preset states. The control circuit receives the slicing signal corresponding to each preset state, compares the slicing signal corresponding to each preset state with a plurality of signal patterns to generate a comparison result, and selects one of the preset states according to the comparison result, such that the control circuit let the equalizer circuit perform the equalizing operation according to the selected preset state.

Transmission circuit for I/O interface and signal transmission method thereof

A temperature-compensated laser driving circuit for driving a laser component is provided. The temperature-compensated laser driving circuit includes: a temperature compensation circuit, configured to generate a second current based on a first current and a temperature-independent current; and a modulation current generating circuit, configured to generate a modulation current based on the second current, and calibrate optical power output of the laser component based on the modulation current. The first current is proportional to the absolute temperature. The second current and the first current have a slope relative to the absolute temperature respectively, and the slope of the second current relative to the absolute temperature is larger than of the slope of the first current relative to the absolute temperature.

Circuitry and method for driving laser with temperature compensation

An exemplary foldable electronic device includes a processing portion, a keyboard, and a latching member. The processing portion includes a main housing. The keyboard is rotatably connected to the processing portion. The keyboard includes a metal housing. The latching member is arranged in the main housing. The latching member includes a magnet. When the keyboard abuts against the processing portion, the attraction force between the magnet and the metal housing is greater than the force of the gravity acting on the keyboard, the keyboard is attached to the processing portion.

Foldable electronic device with magnetic latch

A clock data recovery circuit with feedback type phase discrimination. The clock data recovery circuit has an output signal of B bits and comprises a sampler, a phase region decision circuit, a phase status register and a multiplexer. The sampler oversamples k*B bits per cycle from a data input signal according to a sampling clock signal. The phase region decision circuit generates a plurality of binary up-down decision signals according to the oversampled data input signal and a current phase status signal. The phase status register generates the current phase status signal according to the binary up-down decision signals. The multiplexer selects data of B bits from the oversampled data input signal according to the current phase status signal.

Clock data recovery circuit with phase decision circuit

A phase lock loop (PLL) clock generator with programmable frequency and skew is provided in the present invention, in which frequency of clock signals generated can be dynamically changed and skew of the clock signals generated can be dynamically adjusted by a computer program. Also, the signal skew due to the change of loading can be compensated. Therefore, the PLL clock generator based on a closed-loop configuration can better control the skew of clock signals to provide higher stability and durability to the system.

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Taipei, Taiwan

Wei-Yu Wang