Powerchip Semiconductor Manufacturing Corporation

Mediatek Corporation

Wei-Yu Lin

Shih-Hao Cheng

Kuo-Jung Lan

Kun-Hung Hsieh

Tzu-Ming Chou

Yao-Lung Chuang

Chun-Jen Chen

Chuan-Chieh Lin

Kuo-Yu Yeh

A capacitor integrated structure, a capacitor unit and a manufacturing process thereof are provided. The manufacturing process of capacitor units includes the steps of: forming a plurality of capacitor stacking structures on a substrate having an insulation layer thereon; performing a first cut on insulation dividers provided between the adjacent capacitor stacking structures to form a plurality of recesses that expose first conductive portion and second conductive portion of each of the capacitor stacking structures; filling a metallic material in the recesses to form a plurality of metallic dividers that are electrically connected to the first conductive portion and the second conductive portion of each of the capacitor stacking structures; performing a second cut on the metallic dividers to form a plurality of independent capacitor units; and forming metallic walls on two opposite sides of each of the capacitor units, so as to provide a capacitor unit having two end electrodes.

Capacitor intergated structure.capacitor unit and manufacturing process thereof

A capacitor is made using a wafer, and includes structural elevation portions to allow an electrode layer in the capacitor to be extended along surface profiles of the structural elevation portions to thereby increase its extension length, so as to reduce capacitor area, simplify capacitor manufacturing process and reduce manufacturing cost.

Capacitor integrated structure

A capacitor structure including a substrate, a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, a third electrode, and a stress balance layer is provided. The substrate has trenches and a pillar portion located between two adjacent trenches. The first electrode is disposed on the substrate, on the pillar portion, and in the trenches. The first dielectric layer is disposed on the first electrode and in the trenches. The second electrode is disposed on the first dielectric layer and in the trenches. The second dielectric layer is disposed on the second electrode and in the trenches. The third electrode is disposed on the second dielectric layer and in the trenches. The third electrode has a groove, and the groove is located in the trench. The stress balance layer is disposed in the groove.

Capacitor structure and manufacturing method thereof

A capacitor unit formed by a capacitor integrated structure is provided. The capacitor integrated structure is cut to form capacitor units separated from each other, and each of the capacitor units includes: a substrate; an isolation layer located on the substrate; a capacitor stacked structure located on the isolation layer, wherein the isolation layer electrically isolates the substrate from the capacitor stacked structure; and two electrode connectors located on the capacitor stacked structure and being exposed.

Capacitor unit

A method of manufacturing a trench transistor structure including the following steps is provided. A substrate structure is provided. A first region and a second region are defined in the substrate structure. The substrate structure has a first trench located in the first region and a second trench located in the second region. A transistor device is formed in the first region. The transistor device includes an electrode located in the first trench. The electrode and the substrate structure are isolated from each other. An electrostatic discharge (ESD) protection device is formed in the second region. The ESD protection device includes a main body layer located in the second trench. The main body layer has a planarized top surface. PN junctions are located in the main body layer. The main body layer and the substrate structure are isolated from each other.

Method of manufacturing trench transistor structure

A capacitor unit and a manufacturing method thereof are provided. The manufacturing method includes the following steps. An isolation layer is formed on a substrate. A first capacitor stacked structure and a second capacitor stacked structure are formed on the isolation layer. Electrode connectors are formed on the first capacitor stacked structure and the second capacitor stacked structure. The electrode connectors are exposed, so that the electrode connectors, the first capacitor stacked structure, the second capacitor stacked structure, the isolation layer, and the substrate are combined to form a capacitor integrated structure, wherein the isolation layer electrically isolates the substrate from the first capacitor stacked structure and the second capacitor stacked structure. The capacitor integrated structure is cut to form a first capacitor unit and a second capacitor unit separated from each other.

Manufacturing method for capacitor unit by cutting

A trench transistor structure includes a substrate structure, a transistor device, and an electrostatic discharge (ESD) protection device. A first region and a second region are defined in the substrate structure. The substrate structure has a first trench located in the first region and a second trench located in the second region. The transistor device is located in the first region and includes an electrode located in the first trench. The electrode and the substrate structure are isolated from each other. The ESD protection device is located in the second region and includes a main body layer located in the second trench. The main body layer has a planarized top surface. PN junctions are located in the main body layer. The main body layer and the substrate structure are isolated from each other.

Trench transistor structure and manufacturing method thereof

A recording method for an optical disk drive is implemented as follows. First, at least one of the level of the focusing error signal, the level of the tracking error signal, a wobble synchronization pattern loss, the error rate of demodulating a wobble signal, the frequency of buffer under-run occurrence, the temperature of the drive, the wobble jitter and the level of write power is detected. If at least one detected value exceeds the preset value, the recording will be ceased. Then, the rotation speed of the optical disk drive is decreased, and the recording is resumed with the decreased rotation speed. If at least one of the temperature of the drive, the wobble jitter and the estimated write power exceeds the reset value before recording starts, the rotation speed of the optical disk drive is decreased before recording.

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Hsinchu, Taiwan

Wei-Yu Lin