Industrial Technology Research Institute

Taiwan Semiconductor Manufacturing Comp. Ltd.

TSMC China Company Limited

National Sun Yat-Sen University of Kaohsiung

Wei Yu Li

Ra-Min Tain

Ming-Che Hsieh

Yaqi Ma

Yongliang Jin

Ming-Ji Dai

Yu-Lin Chao

Chin-Hung Wang

Shu-Jung Yang

Kin Lu Wong

Chun Yih Wu

John H Lau

Chih-Yuan Cheng

CunCun Chen

Rong-Chang Fang

Hsuan-Chi Weng

Chia-Chung Liu

Ming Fang Tu

Kai Zhou

A monitoring device for physiological signal monitoring includes a first light receiving and transmitting device and a control device. The first light receiving and transmitting device generates a first light signal to an object and receives a second light signal to generate a first electrical signal. The control device controls the first light receiving and transmitting device to generate the first light signal in a first period, and controls the first light receiving and transmitting device to receive the second light signal to generate the first electrical signal in a second period. The invention further includes an operating method for physiological signal monitoring.

Monitoring device for physiological signal monitoring and operation method thereof

A circuit (to shape a follower voltage for a follower circuit) includes a tie-low circuit and an anti-noise circuit. The tie-low circuit is connected between a follower node and a first reference voltage. The tie-low circuit is responsive to a second reference voltage. The follower node is connectable to the follower circuit. The anti-noise circuit is connected between the follower node and the second reference voltage. The anti-noise circuit is configured to protect the follower voltage at the follower node from otherwise being distorted by a noise voltage being coupled capacitively to the follower node.

Semiconductor circuit including a tie-low circuit and method of fabricating same

A circuit includes an output node and an amplifier and first and second branches coupled between power supply and reference nodes. The first branch includes a first switching device coupled between a first amplifier input and the reference node, the second branch includes a second switching device coupled between the output node and a second amplifier input, and a third switching device is coupled between the power supply and output nodes. Responsive to a first voltage level on the power supply node, each of the first and second switching devices is switched off and the third switching device is switched on, and responsive to a second voltage level on the power supply node greater than the first voltage level, each of the first and second switching devices is switched on and the third switching device is switched off.

Dual mode supply circuit and method

A circuit includes a first passive device between supply and bias nodes, a first switching device and a second passive device between the bias and a reference node, a transistor between the supply and an output node, a third passive device and a second switching device between the output and a feedback node, a fourth passive device between the feedback and reference nodes, a third switching device between the supply and output nodes, and an amplifier controlling the transistor based on bias node and feedback node voltages. In a first mode, the first and second switching devices are off, the third switching device is on, and the supply node receives a first voltage level. In a second mode, the first and second switching devices are on, the third switching device is off, and a second voltage level greater than the first voltage level is received on the supply node.

A measuring apparatus including a first chip, a first circuit layer, a first heater, a first stress sensor and a second circuit layer is provided. The first chip has a first through silicon via, a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface. The first heater and the first stress sensor are disposed on the first surface and connected to the first circuit layer. The second circuit layer is disposed on the second surface.

Measuring apparatus that includes a chip having a through silicon via, a heater, and a stress sensor

A mobile communication device includes a ground plane and an antenna. The antenna is disposed on a dielectric substrate and includes a radiating metal portion, a coupling metal portion, and an inductive shorting metal portion. The radiating metal portion provides a resonant path for the antenna to generate first and second operating bands. The coupling metal portion is coupled to the radiating metal portion to form a first coupling portion and is connected to a source through a connecting metal strip. One end of the inductive shorting metal portion is electrically connected to the radiating metal portion, and the other end is electrically connected to the ground plane. The inductive shorting metal portion includes a first fractional section coupled to the radiating metal portion to form a second coupling portion, and a second fractional section coupled to the coupling metal portion to form a third coupling portion.

Mobile communication device

The disclosure provides a chip package structure and method for fabricating the same. The chip package structure includes at least one chip having at least one through via. At least one stress buffering structure is disposed in the through via. The stress buffering structure includes a first gasket and a second gasket. A supporting pillar has two terminals respectively connected to the first gasket and the second gasket. The cross-sectional area of the supporting pillar is smaller than areas of the first gasket and the second gasket. A buffering layer is sandwiched between the first gasket and the second gasket, surrounding a sidewall of the supporting pillar. An insulating layer is disposed on the through via, surrounding a sidewall of the stress buffering structure.

Chip package structure and method for fabricating the same

A chip package structure includes a substrate, a chip, a thermal conductive layer, a plurality of signal contacts, and a molding compound. The substrate includes a plurality of first thermal conductive vias, a connecting circuit, and a plurality of signal vias electrically connected to the connecting circuit, and the substrate has a chip disposing region. The chip is disposed on the chip disposing region of the substrate and electrically connected to the signal vias through the connecting circuit. The thermal conductive layer is disposed over the substrate, connected to the first thermal conductive vias, and located above the chip disposing region. Besides, the thermal conductive layer has first openings exposing the signal vias. The signal contacts are respectively disposed in the first openings and connected to the signal vias. The molding compound encapsulates the chip.

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Yilan, Taiwan

Wei Yu Li