Taiwan Semiconductor Manufacturing Comp. Ltd.

Wei Wang

Chun Lin Tsai

Ru-Yi Su

Yao-Chung Chang

Wei-Chen Yang

Kuo-Cheng Chiang

Shi Ning Ju

Kuan-Ting Pan

Chih-Hao Wang

Yi-Ruei Jihan

In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first semiconductor layers and second semiconductor layers is formed, an isolation insulating layer is formed so that the stacked layer are exposed from the isolation insulating layer, a sacrificial cladding layer is formed over at least sidewalls of the exposed stacked layer, a sacrificial gate electrode is formed over the exposed stacked layer, an interlayer dielectric layer is formed, the sacrificial gate electrode is partially recessed to leave a pillar of the remaining sacrificial gate electrode, the sacrificial cladding layer and the first semiconductor layers are removed, a gate dielectric layer wrapping around the second semiconductor layer and a gate electrode over the gate dielectric layer are formed, the pillar is removed, and one or more dielectric layers are formed in a gate space from which the pillar is removed.

Method of manufacturing semiconductor devices and semiconductor devices

Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure, the method includes forming a buffer layer over a substrate. An active layer is formed on the buffer layer. A top electrode is formed on the active layer. An etch process is performed on the buffer layer and the substrate to define a plurality of pillar structures. The plurality of pillar structures include a first pillar structure laterally offset from a second pillar structure. At least portions of the first and second pillar structures are spaced laterally between sidewalls of the top electrode.

Electrode structure for vertical group III-V device

Various embodiments of the present disclosure are directed towards a semiconductor structure including a buffer layer disposed between an active layer and a substrate. The active layer overlies the substrate. The substrate and the buffer layer include a plurality of pillar structures that extend vertically from a bottom surface of the active layer in a direction away from the active layer. A top electrode overlies an upper surface of the active layer. A bottom electrode underlies the substrate. The bottom electrode includes a conductive body and a plurality of conductive structures that respectively extend continuously from the conductive body, along sidewalls of the pillar structures, to a lower surface of the active layer.

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Hsin-Chu, Taiwan

Wei Wang