Changxin Memory Technologies, Inc.

Wei Wan

Pan Wang

Yang Liu

Chunyu Xiu

Xuesheng Wang

Shuai Zhang

Embodiments relate to a semiconductor structure and a method for fabricating the same. The semiconductor structure includes: a base substrate including a trench, where the trench includes a gate structure whose top surface is lower than a top surface of the trench; first etch stop layers, where the first etch stop layers cover the top surface of the gate structure, part of a side wall of the trench, and an upper surface of the base substrate; an enclosed isolation structure positioned between the first etch stop layers in the trench, where the enclosed isolation structure at least plugs an opening of the trench; and an air gap positioned between the first etch stop layer and the enclosed isolation structure, where the air gap at least includes a transverse portion, and a bottom of the enclosed isolation structure is positioned on the transverse portion.

Semiconductor structure and method for fabricating same

A method for forming the active area includes the following operations. A semiconductor substrate is provided. A first mask layer and a second mask layer are sequentially formed on a surface of the semiconductor substrate, in which the second mask layer has an initial pattern for forming the active area. A sacrificial layer covering the second mask layer is formed. The sacrificial layer and a portion of the second mask layer are removed to form a third mask layer with a preset thickness, in which the preset thickness is less than an initial thickness of the second mask layer. The active area is formed through the third mask layer and the first mask layer.

Method for forming active area and method for forming semiconductor structure

Embodiments of the present application disclose a semiconductor structure, a formation method thereof and a memory. The semiconductor structure includes: a substrate; a channel located in the substrate, the channel being configured to form a gate structure; and a convex portion arranged on an inner wall of the channel. The embodiments of the present application can increase a channel length and solve a short-channel effect.

Semiconductor structure, formation method thereof and memory

A semiconductor structure and a method for forming the same are provided. The method includes: providing a semiconductor substrate; determining a position of a bit line contact opening on a top surface of the semiconductor substrate and a top surface of a first dielectric layer; etching an active region, the first dielectric layer and an isolation structure exposed by the bit line contact opening according to the position of the bit line contact opening until the active region is etched to a preset depth to form a bit line contact window; and forming a second dielectric layer on a surface of the isolation structure and a surface of the first dielectric layer that have a depth greater than a depth of a surface of the active region in the bit line contact window.

Semiconductor structure and method for forming the same

A method for manufacturing the semiconductor structure includes: providing a substrate, in which active regions and isolation regions are formed; forming grooves in the active regions, which include first grooves located at upper portions and second grooves located at lower portions and communicating with the first grooves, and a width of the first grooves is greater than a width of the second grooves; and forming gate structures in the first grooves and the second grooves.

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Hefei, China

Wei Wan