Vanguard International Semiconductor Corporation

National Sun Yat-sen University of Kaohsiung

Wei-Ting Chen

Der-Min Tsay

Jui-Lung Chen

Jao-Hwa Kuang

Tzuen-Lih Chern

Li-Hsiang Liu

Yeh-Ning Jou

Chieh-Yao Chuang

Chun-Chih Chen

Jung-Tsun Chuang

Po-Yuan Tang

Guan-shyong Hwang

Chien-Wei Wang

Jian-Yuan Hsiao

Tien-Hui Huang

Feng-Chih Kuo

Tsung-Mou Huang

Yu-Hsi Ke

Ping-Lung Pan

A trigger circuit coupled between an input-output pad and a core circuit and including an adjustment circuit and a protection circuit is provided. The adjustment circuit adjusts the voltage of the input-output pad to generate an output voltage. The protection circuit is coupled between the adjustment circuit and the core circuit and receives a system enable signal. In response to the system enable signal being disabled or an electrostatic discharge (ESD) event occurring on the input-output pad, the protection circuit disables the core circuit according to the output voltage. In response to the system enable signal being enabled, the protection circuit stops disabling the core circuit.

Trigger circuit and operating circuit

A test circuit testing a storage circuit and including a controller, a pattern-generator circuit, a comparing circuit, and a first register is provided. The storage circuit includes a storage block. The controller is configured to generate a plurality of internal test signals. The pattern-generator circuit generates and provides test data to the storage circuit according to the internal test signal. The storage circuit writes the test data into the storage block and reads the storage block to generate read data. The comparing circuit compares the test data and the read data to generate a test result. The first register stores the test result. The controller determines whether the storage circuit is working normally according to the test result stored in the first register.

Test circuit for testing a storage circuit

A low dropout regulator is provided. The low dropout regulator includes an output-stage circuit, a reference-voltage generation circuit, a timing controller, and an active low dropout circuit. When the low dropout regulator is at an operation mode, the output-stage circuit is controlled by a first enable signal to generate first output voltage to an output node of the low dropout regulator. The reference-voltage generation circuit is controlled by a bias voltage to generate a first reference voltage. The timing controller is coupled to the output node and receives the first reference voltage. When the low dropout regulator is in the operation mode, the timing controller programs the first enable signal according to the reference voltage and the voltage at the output node. When the low dropout regulator is in a standby mode, the active low dropout circuit generates a second output voltage to the output node.

Low dropout regulators with fast response speed for mode switching

A wind power excitation synchronous generation system having a maximum power determining unit and a control method thereof are disclosed. In this control method, dual input shafts and a single output shaft of a gear transmission mechanism are used, and two kinds of inputted power, such as wind power and servo motor control power, are integrated, so as to allow the output shaft to drive an excitation synchronous generator to generate electric power. In this system, a rotation speed and a phase of a servo motor are controlled, so as to allow the excitation synchronous generator to output the electric power with a frequency and a phase identical to the utility grid.

Wind power excitation synchronous generation system having maximum power determining unit and control method thereof

A memory device is provided. The memory device includes a memory device, a plurality of word lines and bit lines, first and second decoders, and a control circuit. The memory array includes memory cells on rows and columns. Each word line is coupled to the memory cells in one row. Each bit line is coupled to the memory cells in one column. The first decoder selects one word line according to an address signal and a first control signal. The control circuit respectively generates the first control signal and the second control signal according to a first clock signal and a second clock signal. In the period during which the first decoder selects the one word line, the second decoder selects at least two bit lines according to the address signal and a second control signal. The memory device performs a read/write operation on the selected bit lines.

Memory devices and control methods thereof

A stand-alone wind power generation system and a method for controlling an excitation synchronous generator thereof are provided. In this method, an input wind power is transformed into an electrical power and outputted to a load. With the use of a coaxial configuration, a windmill, a speed-increasing gearbox, the excitation synchronous generator, and a motor are integrated in the same shaft. The output voltage of the generator is stabilized by an excitation field control. With the use of a motor servo control, the speed of generator can be stabilized under a wind disturbance condition. Therefore, the output power and frequency can be stable. A power flow management unit can control battery sets to charge and discharge, so as to accomplish the proposed control method.

Wind power generation system and method for controlling excitation synchronous generator thereof

Growing community of inventors

Kaohsiung, Taiwan

Wei-Ting Chen