Au Optronics Corporation

Wei-Sheng Yu

Chun-Yao Huang

Pin-Miao Liu

Hsiao-Wei Cheng

Wen-Shin Wu

Ming-Yung Huang

Sung-Hui Lin

Chien-Hung Chen

Hsiang-Lin Lin

Kuo-Lung Fang

Han-Tu Lin

Hsien-Chieh Tseng

Chia-Ming Chang

Shu-Feng Wu

Shu-Wei Tsao

Chi-Jui Lin

Ming-Hao Chang

A dual gate transistor circuit, a pixel circuit, and a gate drive circuit are provided. The dual gate transistor circuit includes a dual gate transistor, a first diode, and a second diode. The dual gate transistor has a first gate and a second gate, and the first gate receives a drive signal. The first diode is connected in series between the first gate and the second gate according to a first-polarity direction. The second diode is connected in series between the first gate and the second gate according to a second-polarity direction. The first-polarity direction is opposite to the second-polarity direction.

Dual gate transistor circuit, pixel circuit and gate drive circuit thereof

A pixel structure including a scan line, a data line, an active device, a pixel electrode, a capacitor electrode line, a semi-conductive pattern layer and at least one dielectric layer is provided. The active device is electrically connected to the scan line and the data line. The pixel electrode is electrically connected to the active device. The capacitor electrode line is located under the pixel electrode. A first storage capacitor is formed between the capacitor electrode line and the pixel electrode. The semi-conductive pattern layer is disposed between the capacitor electrode line and the pixel electrode, the pixel electrode is electrically connected to the semi-conductive pattern layer. A second storage capacitor is formed between the semi-conductive pattern layer and the capacitor electrode line. The dielectric layer is disposed between the capacitor electrode line and the pixel electrode and located between the semi-conductive pattern layer and the capacitor electrode line.

Pixel structure having metal-insulator-semiconductor capacitor

A pixel structure having an SMII (semiconductor-metal-insulator-ITO) capacitor is provided. Specifically, a partial region of a transparent electrode layer corresponding to a semiconductor layer is removed, so as to eliminate parasitic capacitance between the transparent electrode layer and the semiconductor layer, prevent defects (e.g., waterfall, image sticking, etc.) from occurring on the display frame, and improve the display quality.

Pixel structure

An active matrix array structure, disposed on a substrate, includes a first patterned conductive layer, a patterned gate insulating layer, a patterned semiconductor layer, a second patterned conductive layer, a patterned overcoat layer and a transparent conductive layer. The patterned gate insulating layer has first openings that expose a part of the first patterned conductive layer. The patterned semiconductor layer is disposed on the patterned gate insulating layer. The second patterned conductive layer is disposed on the patterned semiconductor layer. The patterned overcoat layer has second openings that expose a part of the first patterned conductive layer and a part of the second patterned conductive layer. The transparent conductive layer is completely disposed on the substrate. The transparent conductive layer disposed in the first openings and the second openings is broken off at a position that is in between the substrate and the patterned overcoat layer.

Active matrix array structure

A method for manufacturing a thin film transistor (TFT) array substrate needs only or even less than six mask processes for manufacturing the TFT array substrate integrated with a color filter pattern. Therefore, the manufacturing method is simpler and the manufacturing cost is reduced. In addition, the manufacturing method needs not to form a contact window in a relative thick film layer such as a planarization layer or a color filter layer, so as to connect the pixel electrode to the source/drain. Thus, the difficulty of the manufacturing process is effectively reduced.

Method for manufacturing thin film transistor array substrate

Method of manufacturing active matrix array structure

A thin film transistor array (TFT) substrate and a method for manufacturing the same are provided. The manufacturing method needs only or even less than six mask processes for manufacturing the TFT array substrate integrated with a color filter pattern. Therefore, the manufacturing method is simpler and the manufacturing cost is reduced. In addition, the manufacturing method needs not to form a contact window in a relative thick film layer such as a planarization layer or a color filter layer, so as to connect the pixel electrode to the source/drain, thus the difficulty of the manufacturing process is effectively reduced.

Thin film transistor array substrate

Growing community of inventors

Taipei, Taiwan

Wei-Sheng Yu