Taiwan Semiconductor Manufacturing Comp. Ltd.

Wei-Rong Chen

Hung-Chih Wang

Yao Hsiang Liang

Chen-Kuang Lien

Methods and apparatus are disclosed for the back end of line process for fabrication of integrated circuits (ICs). The inter-metal dielectric (IMD) layer between two metal layers may comprise an etching stop layer over a metal layer, a low-k dielectric layer over the etching stop layer, a dielectric hard mask layer over the low-k dielectric layer, an nitrogen free anti-reflection layer (NFARL) over the dielectric hard mask layer, and a metal-hard-mask (MHM) layer of a thickness in a range from about 180 &#x212b; to about 360 &#x212b; over the NFARL. The MHM layer thickness is optimized at the range from about 180 &#x212b; to about 360 &#x212b; to reduce the Cu pits while avoiding the photo overlay shifting issue.

Growing community of inventors

Taipei, Taiwan

Wei-Rong Chen