Beijing Baidu Netcom Science and Technology Co., Ltd.

Kunlunxin Technology (beijing) Company Limited

Emc IP Holding Company LLC

Emc Corporation

Baidu USA LLC

Baidu.com Times Technology (beijing) Co. Ltd.

Baidu Online Network Technology (beijing) Co., Ltd.

X-signal Integrated Co., Ltd.

Microfun Co., Ltd

Iwatt Integrated Circuits Technology (tianjin) Limited

Dialog Semiconductor (shenzhen) Limited

Dialog Integrated Circuits (tianjian) Limited

Wei Qi

Jian Ouyang

Yong Wang

Jing Wang

Junping Zhao

Gang Xie

Jialin Yang

Yichen Tu

Kevin Xu

Nailong Wang

Yupeng Li

Xiaozhang Gong

Ningyi Xu

Yang Yan

Zihao Liang

Xianglun Leng

Zhengze Qiu

Ni Zhou

Fenghua Hu

Chi Gao

Peng Wu

Ivan Bassov

Lin Liu

Yingze Bao

Le Kang

Hefei Zhu

Xin Zhong

Zhenyu Song

Zhiqiu Ye

Zhibiao Zhao

Qingshu Chen

Yiyu Peng

Guanglai Deng

Canghai Gu

Sijie Yang

Can Ye

Friar Yangfeng Chen

Wenxuan Yin

Bin Hou

Sizhong Li

A method for processing an image, an electronic device, and a storage medium are provided. The method includes: acquiring an input image, the input image including a plurality of channels, and each channel of the plurality of channels including a plurality of pixel points; performing pixel extractions in parallel using a plurality of dedicated processing units on each channel of the input image, to obtain pixel point data for each corresponding pixel point of each channel; and splicing the pixel point data for each corresponding pixel point of each channel to obtain an output image.

Method for processing image, electronic device and storage medium

The present disclosure provides a method of processing an image, an electronic device, and a storage medium, which may be used in a field of artificial intelligence, especially in a field of image processing, etc. The method includes: acquiring an input image containing a plurality of rows of pixels; performing, by using a plurality of dedicated processing units, a pixel extraction in parallel on each row of pixels of the plurality of rows of pixels in the input image, so as to obtain row data for each row of pixels; and stitching the row data for each row of pixels, so as to obtain an output image.

Method of processing image, electronic device, storage medium, and program product

Embodiments of the present disclosure propose a deep learning processing apparatus and method, device and storage medium, relating to the field of artificial intelligence. A deep learning processing apparatus includes: at least one matrix multiply-add module, configured to perform a matrix multiply-add operation of a convolution kernel parameter value matrix of a convolutional layer in a convolutional neural network and a first error gradient value matrix to obtain a plurality of intermediate matrices; a storage apparatus, configured to store the plurality of intermediate matrices without reshaping elements in the plurality of intermediate matrices; and a plurality of matrix accumulation modules, configured to read the plurality of intermediate matrices from the storage apparatus and perform a matrix accumulation operation based on the plurality of intermediate matrices according to a convolution scheme of the convolutional layer in parallel, to obtain a second error gradient value matrix for the convolutional layer.

Deep learning processing apparatus and method, device and storage medium

A current sampling circuit with on-chip real-time calibration is used to detect the on-state current of a driving transistor. The current sampling circuit includes a first resistor, a second resistor, a voltage sampling circuit, a sampling voltage operational circuit and an on-state resistance calibration circuit. The voltage sampling circuit is used to obtain on-state voltage drop value of the driving transistor Vds. The on-state resistance calibration circuit includes a reference current source and a calibrating transistor. On-state resistance value of the calibrating transistor is set to be K1 times of on-state resistance value of the driving transistor. The on-state voltage drop value Vds obtained by the voltage sampling circuit and the on-voltage drop value of the calibrating transistor Vrsns are input to the sampling voltage operational circuit to obtain proportional relationship K2 between the on-state voltage drop value Vds and the on-state voltage drop value Vrsns.

High precision current sampling circuit with on-chip real-time calibration

A data sorting method, apparatus and device, a storage medium, and a program product. The method includes: obtaining a data sorting and updating request, where the data sorting and updating request includes data to be updated and an update type; determining a current cursor node, according to the data sorting and updating request, from a circular doubly linked list corresponding to a binary heap storing original data and according to pointing of the current cursor node pointer; determining a node to be updated corresponding to the data to be updated in the binary heap according to the update type and the current cursor node; and performing updating and sorting operations on the original data according to the node to be updated and the data to be updated.

Data sorting method, apparatus and device, storage medium and program product

According to various embodiments, methods and systems are provided to accelerate artificial intelligence (AI) model training with advanced interconnect communication technologies and systematic zero-value compression over a distributed training system. According to an exemplary method, during each iteration of a Scatter-Reduce process performed on a cluster of processors arranged in a logical ring to train a neural network model, a processor receives a compressed data block from a prior processor in the logical ring, performs an operation on the received compressed data block and a compressed data block generated on the processor to obtain a calculated data block, and sends the calculated data block to a following processor in the logical ring. A compressed data block calculated from corresponding data blocks from the processors can be identified on each processor and distributed to each other processor and decompressed therein for use in the AI model training.

Accelerating AI training by an all-reduce process with compression over a distributed system

A lighting system and a method are provided with an adaptive power balancing scheme which reduces or eliminates flicker by sensing the operation of a lamp that is connected to an electronic transformer and adaptively controlling the drive circuit of the lamp to prevent unexpected reset of the electronic transformer. There is provided a lamp with a light source and a drive circuit for the light source; said drive circuit has a power stage for regulating a voltage supplied to the light source, an energy storage device, and control means arranged to selectively disable the power stage. Power is provided to the light source by the energy storage device when the power stage is disabled.

Adaptive power balancing in LED lamps

A method and apparatus for executing an instruction are provided. In the method, an instruction queue is first generated, and an instruction from the instruction queue in preset order is acquired. Then, a sending step including: determining a type of the acquired instruction; determining, in response to determining that the acquired instruction is an arithmetic instruction, an executing component for executing the arithmetic instruction from an executing component set; and sending the arithmetic instruction to the determined executing component is executed. Last, in response to determining that the acquired instruction is a blocking instruction, a next instruction is acquired after receiving a signal for instructing an instruction associated with the blocking instruction being completely executed.

Method and apparatus for executing instructions including a blocking instruction generated in response to determining that there is data dependence between instructions

According to embodiments of the present disclosure, there is provided a data transmission apparatus. The data transmission apparatus includes a plurality of first ports, a plurality of second ports, and a plurality of data channels. The plurality of first ports are coupled to a processing unit. The plurality of second ports are coupled to a plurality of memories. The plurality of data channels are disposed among the first ports and the second ports to form an interleaving network having a plurality of layers, and configured to transmit data among the processing unit and the plurality of memories, such that each layer in the interleaving network includes at least one interleaving sub-network.

Data transmission apparatuses, data processing systems and methods

Example embodiments of the present disclosure provide a method, an apparatus, a device and a computer-readable storage medium for storage management. The method for storage management includes: obtaining an available channel mode of a plurality of channels in a memory of a data processing system, the available channel mode indicating availabilities of the plurality of channels, and each of the plurality of channels being associated with a set of addresses in the memory; obtaining a channel data-granularity of the plurality of channels, the channel data-granularity indicating a size of a data block that can be carried on each channel; obtaining a target address of data to be transmitted in the memory; and determining a translated address corresponding to the target address based on the available channel mode and the channel data-granularity.

Method, apparatus, device and computer-readable storage medium for storage management

Described herein are systems and methods that allow for dense depth map estimation given input images. In one or more embodiments, a neural network model was developed that significantly differs from prior approaches. Embodiments of the deep neural network model comprises more computationally efficient structures and fewer layers but still produces good quality results. Also, in one or more embodiments, the deep neural network model may be specially configured and trained to operate using a hardware accelerator component or components that can speed computation and produce good results, even if lower precision bit representations are used during computation at the hardware accelerator component.

Stereo camera depth determination using hardware accelerator

The present application discloses a method and apparatus for processing a data sequence. A specific implementation of the method includes: receiving an inputted to-be-processed data sequence; copying a weight matrix in a recurrent neural network model to an embedded block random access memory (RAM) of a field-programmable gate array (FPGA); processing sequentially each piece of to-be-processed data in the to-be-processed data sequence by using an activation function in the recurrent neural network model and the weight matrix stored in the embedded block RAM; and outputting a processed data sequence corresponding to the to-be-processed data sequence. This implementation improves the data sequence processing efficiency of the recurrent neural network model.

Method and apparatus for processing data sequence

Disclosed are an apparatus for data processing, an artificial intelligence chip, and an electronic device. The apparatus for data processing includes: at least one input memory, at least one data conveying component, at least one multiplexed arbitration component, and at least one output memory. The input memory is connected to the data conveying component, the data conveying component is connected to the multiplexed arbitration component, and the multiplexed arbitration component is connected to the output memory.

Apparatus for data processing, artificial intelligence chip and electronic device

The present application discloses a data processing method and apparatus. A specific implementation of the method includes: receiving floating point data sent from an electronic device; converting the received floating point data into fixed point data according to a data length and a value range of the received floating point data; performing calculation on the obtained fixed point data according to a preset algorithm to obtain result data in a fixed point form; and converting the obtained result data in the fixed point form into result data in a floating point form and sending the result data in the floating point form to the electronic device. This implementation improves the data processing efficiency.

Data processing method and apparatus

The present application discloses a method, system and apparatus for storing a website private key plaintext. A specific implementation of the method includes: receiving a public key sent from a terminal configured to perform encryption and decryption, wherein the public key is generated at random by the terminal; encrypting a website private key plaintext by using the public key to generate a website private key ciphertext, wherein the website private key plaintext is pre-acquired; and sending the website private key ciphertext to the terminal, so that the terminal decrypts the website private key ciphertext by using the private key to generate the website private key plaintext and store the website private key plaintext in the terminal. This implementation improves the security of storage of the website private key plaintext.

Method, system and apparatus for storing website private key plaintext

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Beijing, China

Wei Qi